EPM7128SLC84-7N vs EPM7128SLC84-6N 比較
詳細並排比較 EPM7128SLC84-7N 由 Intel 與 EPM7128SLC84-6N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM7128SLC84-7N | EPM7128SLC84-6N |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | 最後購買 |
| Series | MAX 7000S | — |
| Programmable Type | In System Programmable (ISP) | — |
| 記憶體類型 | EEPROM | — |
| Number of Macrocells | 128 | — |
| Number of Logic Elements/Blocks | 8 (Logic Array Blocks) | — |
| Number of Usable Gates | 2,500 | — |
| Number of I/O Pins | 68 | — |
| Propagation Delay (tpd) Max | 7.5 ns | — |
| Maximum Operating Frequency | 125 MHz | 147.1 MHz |
| Counter Speed (Internal) | up to 175.4 MHz (family max) | — |
| Supply Voltage (VCCINT) | 4.75 V to 5.25 V (5 V nominal) | — |
| 工作溫度 | 0 C to +70 C (Commercial) | [DATA_NEEDED: operating temperature range] |
| 封裝 | 84-LCC (J-Lead), PLCC-84 | 84-pin PLCC (J-lead) |
| 安裝類型 | Surface Mount | — |
| MSL 等級 | [DATA_NEEDED: MSL level] | — |
| RoHS 狀態 | Compliant (lead-free 'N' suffix) | Non-Compliant (legacy 5V part) |
| Family | — | MAX 7000S |
| Device System Gates | — | 2500 |
| Number of Macro Cells | — | 128 |
| Number of User I/Os | — | 68 |
| Number of Logic Blocks/Elements | — | 8 |
| Number of Global Clocks | — | 2 |
| Product Terms per Macro Cell | — | 32 |
| Pin-to-Pin Delay (Speed Grade) | — | 6 ns |
| 供應電壓 | — | 5 V |
| Process Technology | — | CMOS, EEPROM |
| Program Memory Type | — | EEPROM |
| In-System Programmability | — | Yes (ISP via JTAG) |