EPM7160SQC160-10 vs EPM7192SQC160-15 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM7160SQC160-10 sa pamamagitan ng Altera at EPM7192SQC160-15 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EPM7160SQC160-10 - MAX 7000S CPLD, 160 Macro Cells, 100MHz, PQFP-160 | Intel / Altera
EPM7160SQC160-10 ObsoletePagsanggunian na paghahambing
| Parametro | EPM7160SQC160-10 | EPM7192SQC160-15 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | NRND |
| Family | MAX 7000S | MAX 7000S |
| Macro Cells | 160 | — |
| Logic Elements / Gates | 3,200 usable gates | — |
| User I/Os | 104 | — |
| Logic Array Blocks (LABs) | 10 | — |
| Maximum Operating Frequency | 100 MHz | 76.9 MHz |
| Pin-to-Pin Propagation Delay (tPD) | 10 ns | — |
| Supply Voltage (VCCINT) | 5.0 V | — |
| I/O Voltage Tolerance | 5.0 V | — |
| Programming Technology | EEPROM, in-system programmable | — |
| JTAG Support | IEEE 1149.1 (boundary-scan + ISP) | — |
| Packhaging | PQFP-160 (SQC160) | PQFP-160 |
| Temperature na Operasyon | 0 C to +70 C (commercial) | — |
| Logic Family | CMOS | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Process Technology | CMOS, EEPROM-based | CMOS, EEPROM-based |
| Tindminan RoHS | unknown | — |
| Lead-Free | unknown | — |
| Device Type | — | CPLD - Complex Programmable Logic Device |
| Number of Macrocells | — | 192 |
| Number of Logic Array Blocks | — | 4 |
| Number of Usable Gates | — | 3750 |
| User I/O Pins | — | 124 |
| Pin-to-Pin Logic Delay (tPD) | — | 15 ns |
| Volte ng Pagbibigay | — | 5.0 V |
| Programmability | — | In-System (ISP) via JTAG IEEE Std 1149.1 |
| Configuration Memory | — | EEPROM, non-volatile |
| Hanay ng Temperature na Operasyon | — | [DATA_NEEDED: operating temperature range] |