EPM7256AEFC100-7 vs EPM7256AETC100-5C Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM7256AEFC100-7 sa pamamagitan ng Intel at EPM7256AETC100-5C sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EPM7256AEFC100-7 - 256-Macrocell MAX 7000A CPLD, 100-FBGA | Intel
EPM7256AEFC100-7 ✓ NakahandaAltera
EPM7256AETC100-5C - MAX 7000 CPLD, 256 Macrocells, 84 I/O, TQFP-100 | Altera
EPM7256AETC100-5C ObsoletePagsanggunian na paghahambing
| Parametro | EPM7256AEFC100-7 | EPM7256AETC100-5C |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Obsolete |
| Family | MAX 7000A | — |
| Macro Cells | 256 | — |
| Usable Gates | 5,000 | — |
| Logic Array Blocks | 16 | — |
| User I/Os | 84 | — |
| Packhaging | 100-pin FBGA (11x11 mm) | TQFP-100 |
| Bilang ng Pin | 100 | — |
| Supply Voltage - VCCINT | 3.0 V to 3.6 V | — |
| Supply Voltage - VCCIO | 2.5 V, 3.3 V, or 5 V (MultiVolt) | — |
| Propagation Delay (tPD) | 7.5 ns | 5 ns |
| Internal Toggle Rate | 250 MHz | — |
| Maximum Operating Frequency | 126.6 MHz | — |
| Programmable Type | In-System Programmable (EEPROM) | — |
| Programming Interface | IEEE 1149.1 JTAG | — |
| Uri ng Pagpapasok | Surface Mount (FBGA) | Surface Mount |
| Temperature na Operasyon | 0C to +90C (commercial) | 0 °C to +70 °C (commercial) |
| Tindminan RoHS | [DATA_NEEDED: rohs status] | Non-compliant (Pb-bearing TQFP package) |
| Level ng MSL | [DATA_NEEDED: msl level] | — |
| Product Family | — | MAX 7000A |
| Product Type | — | CPLD (Complex Programmable Logic Device) |
| Macrocells | — | 256 |
| Logic Array Blocks (LABs) | — | 16 |
| Maximum User I/O | — | 84 |
| Usable Gates (typical) | — | 6400 |
| Maximum Counter Frequency (fCNT) | — | 200 MHz |
| Supply Voltage (VCCINT) | — | 3.0 V to 3.6 V |
| I/O Voltage (MultiVolt) | — | 2.5 V / 3.3 V / 5.0 V compatible |
| Programming Technology | — | EEPROM (in-system programmable via JTAG) |
| JTAG Support | — | IEEE Std. 1149.1 boundary-scan |
| Lead-Free | — | No |