EPM7256AETC100-5N vs EPM7128AETC100-5N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM7256AETC100-5N sa pamamagitan ng Altera at EPM7128AETC100-5N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EPM7256AETC100-5N - 256-Macro MAX 7000A CPLD, 5ns TQFP-100
EPM7256AETC100-5N ⚠ Huling PagbiliIntel
EPM7128AETC100-5N - 128-Macrocell MAX 7000A CPLD, 5ns | Intel / Altera
EPM7128AETC100-5N ✓ NakahandaPagsanggunian na paghahambing
| Parametro | EPM7256AETC100-5N | EPM7128AETC100-5N |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | Aktibo |
| Family | MAX 7000A | MAX 7000A |
| Series | MAX 7000AE | — |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD - Complex Programmable Logic Device |
| Macro Cells | 256 | — |
| Usable Gates | 5000 (range 600 to 10000) | — |
| User I/Os | 84 | 84 |
| Logic Array Blocks (LABs) | 16 | — |
| Pin-to-Pin Delay (tPD) | 5.0 ns | — |
| Counter Frequency (fCNT) | up to 227.3 MHz | — |
| Supply Voltage (VCCINT) | 3.3 V | — |
| MultiVolt I/O Support | 2.5 V / 3.3 V / 5.0 V | — |
| Packhaging | TQFP-100 (1.0 mm pitch, 14x14 mm) | 100-pin TQFP |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Temperature na Operasyon | 0C to +70C (Commercial) | 0C to +70C (commercial) |
| Program Memory | Internal EEPROM | — |
| In-System Programmability | Yes (IEEE 1149.1 JTAG) | — |
| Tindminan RoHS | Compliant (lead-free) | Compliant |
| Level ng MSL | 3 (168 hours) | — |
| Process Technology | CMOS, EEPROM-based | — |
| Security Bit | Programmable | — |
| Macrocells | — | 128 |
| Logic Gates (typical) | — | 2,500 |
| Pin-to-Pin Logic Delay (tPD) | — | 5 ns |
| Maximum Operating Frequency | — | 192.3 MHz |
| Core Supply Voltage (VCCINT) | — | 3.3 V |
| I/O Bank Supply Voltage (VCCIO) | — | 3.3 V or 2.5 V |
| 5V Tolerant Inputs | — | Yes (when VCCIO = 3.3 V) |
| Programmable Logic Type | — | EEPROM-based, in-system programmable |
| Programming Interface | — | JTAG (IEEE Std. 1149.1) |