EPM7256AETC144-10N vs EPM7256AETI144-7N Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EPM7256AETC144-10N sa pamamagitan ng Intel at EPM7256AETI144-7N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EPM7256AETC144-10N EPM7256AETI144-7N
Brand Intel Intel
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Obsolete NRND
Family MAX 7000A MAX 7000A
Device Type CPLD (Complex Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Usable Gates 5,000 5000
Macro Cells 256 —
Logic Array Blocks 16 —
Maximum User I/O Pins 120 (in 144-pin TQFP) —
Pin-to-Pin Propagation Delay (tPD) 10 ns —
Maximum Internal Frequency 95.2 MHz —
Supply Voltage (Core) 3.3 V —
I/O Voltage Tolerance 5 V-tolerant —
Configuration Memory EEPROM (non-volatile, in-system programmable) —
Programming Interface IEEE 1149.1 JTAG (ISP) JTAG (IEEE 1149.1) / ByteBlaster
Packhaging TQFP-144 (ETC suffix) TQFP-144
Uri ng Pagpapasok Surface Mount Surface Mount
Temperature na Operasyon -40C to +85C (industrial) -40 °C to +85 °C (industrial)
Technology CMOS, EEPROM-based —
Pin Compatibility Pin-compatible with 5.0V MAX 7000S family —
Tindminan RoHS [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS compliance status]
Macrocells — 256
User I/Os — 36 (industrial variant)
Logic Elements — 256
Supply Voltage (VCCINT) — 3.0 V to 3.6 V (3.3 V nominal)
I/O Voltage (VCCIO) — 2.5 V / 3.3 V / 5.0 V tolerant
Pin-to-Pin Logic Delay (tPD) — 7.5 ns
Maximum Internal Frequency (fCNT) — 126.6 MHz
Process Technology — EEPROM (0.3 µm CMOS)
Lead-Free — Yes (per Altera product page)
Level ng MSL — [DATA_NEEDED: moisture sensitivity level]

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