EPM7256SQC208-7N vs EPM7256SQC208-7 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM7256SQC208-7N sa pamamagitan ng Altera at EPM7256SQC208-7 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM7256SQC208-7N | EPM7256SQC208-7 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | NRND |
| Family | MAX 7000S | — |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 256 | 256 |
| Usable Gates | 5,000 | 5,000 |
| Logic Array Blocks (LABs) | 16 | — |
| User I/O Pins | 164 | 164 |
| Speed Grade | -7 (7.5 ns pin-to-pin) | -7 (7.5 ns) |
| Maximum Frequency | 128.2 MHz | — |
| Supply Voltage (VCC) | 5 V | 5.0 V |
| Technology | CMOS EEPROM | — |
| Configuration Memory | Non-volatile EEPROM (no external config needed) | — |
| Packhaging | 208-pin PQFP (Plastic Quad Flat Pack) | 208-pin PQFP (28 x 28 mm, 0.5 mm pitch) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Temperature na Operasyon | Commercial (0C to +70C) | — |
| JTAG Interface | IEEE 1149.1 boundary-scan (ISP capable) | — |
| Minimum DC Input Voltage | -0.5 V | -0.5 V |
| Input Undershoot Tolerance | -2.0 V for <100 mA, <20 ns | -2.0 V for <100 mA, <20 ns |
| Tindminan RoHS | Compliant (N suffix = lead-free) | [DATA_NEEDED: RoHS status] |
| Pin-to-Pin Delay (tPD) | 7.5 ns | — |
| Open-Drain Output | Optional per I/O pin | — |
| Device Family | — | MAX 7000S (EPM7256S) |
| Propagation Delay (tPD) | — | 7.5 ns |
| Maximum Operating Frequency (fMAX) | — | 128.2 MHz |
| Configuration Technology | — | EEPROM (non-volatile) |
| In-System Programmability | — | Yes (IEEE 1149.1 JTAG) |
| Hanay ng Temperature na Operasyon | — | Commercial (0C to +70C) |
| Level ng MSL | — | [DATA_NEEDED: MSL level] |
| Logic Levels | — | 5.0 V CMOS/TTL compatible |