EPM9320ALC84-10N vs EPM9320ALC84-15 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM9320ALC84-10N sa pamamagitan ng Intel at EPM9320ALC84-15 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM9320ALC84-10N | EPM9320ALC84-15 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | NRND |
| Series | MAX 9000A | — |
| Family | MAX 9000 | MAX 9000 CPLD |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Number of Macrocells | 320 | — |
| Number of Gates | 6,000 | — |
| Number of Logic Array Blocks (LABs) | 16 | — |
| User I/O Pins | 60 | — |
| Propagation Delay (tPD) | 10 ns | 16 ns |
| Maximum Internal Frequency (fCNT) | 144.9 MHz | — |
| Supply Voltage (VCC) | 5.0 V nominal | 4.75 V to 5.25 V (5 V nominal) |
| Hanay ng Temperature na Operasyon | 0C to +70C (Commercial) | — |
| Programmable Technology | EEPROM (in-system programmable) | — |
| Programming Interface | JTAG (IEEE 1149.1) | JTAG (IEEE 1149.1) / ISP |
| Packhaging | 84-Pin PLCC (Plastic Leaded Chip Carrier) | 84-pin PLCC (S-PQCC-J84, J-lead) |
| Uri ng Pagpapasok | Through-Hole / Socket | Through-hole / socket |
| Part Status | Obsolete | — |
| Macrocells | — | 320 |
| Usable Gates | — | 6000 |
| User I/O | — | 56 |
| Logic Array Blocks (LABs) | — | 16 |
| Technology | — | CMOS, EEPROM-based configuration |
| Temperature na Operasyon | — | -40C to +85C (industrial) |
| Tindminan RoHS | — | [DATA_NEEDED: rohs status] |
| Level ng Sensitivity sa Asid ng Moisture (MSL) | — | MSL-3 (168 hours per fpgalink.com) |
| Lead-Free / Halogen-Free | — | [DATA_NEEDED: lead free status] |
| RoHS3 Compliance | — | ROHS3 Compliant (per fpgalink.com listing) |