EPM9320ALC84-10N vs EPM9320ALC84-15 比較
詳細並排比較 EPM9320ALC84-10N 由 Intel 與 EPM9320ALC84-15 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM9320ALC84-10N | EPM9320ALC84-15 |
|---|---|---|
| 品牌 | Intel | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | NRND |
| Series | MAX 9000A | — |
| Family | MAX 9000 | MAX 9000 CPLD |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Number of Macrocells | 320 | — |
| Number of Gates | 6,000 | — |
| Number of Logic Array Blocks (LABs) | 16 | — |
| User I/O Pins | 60 | — |
| Propagation Delay (tPD) | 10 ns | 16 ns |
| Maximum Internal Frequency (fCNT) | 144.9 MHz | — |
| Supply Voltage (VCC) | 5.0 V nominal | 4.75 V to 5.25 V (5 V nominal) |
| 工作溫度範圍 | 0C to +70C (Commercial) | — |
| Programmable Technology | EEPROM (in-system programmable) | — |
| Programming Interface | JTAG (IEEE 1149.1) | JTAG (IEEE 1149.1) / ISP |
| 封裝 | 84-Pin PLCC (Plastic Leaded Chip Carrier) | 84-pin PLCC (S-PQCC-J84, J-lead) |
| 安裝類型 | Through-Hole / Socket | Through-hole / socket |
| Part Status | Obsolete | — |
| Macrocells | — | 320 |
| Usable Gates | — | 6000 |
| User I/O | — | 56 |
| Logic Array Blocks (LABs) | — | 16 |
| Technology | — | CMOS, EEPROM-based configuration |
| 工作溫度 | — | -40C to +85C (industrial) |
| RoHS 狀態 | — | [DATA_NEEDED: rohs status] |
| 濕度敏感等級 (MSL) | — | MSL-3 (168 hours per fpgalink.com) |
| Lead-Free / Halogen-Free | — | [DATA_NEEDED: lead free status] |
| RoHS3 Compliance | — | ROHS3 Compliant (per fpgalink.com listing) |