EPM9320ARC208-10 vs EPM9320RC208-15N Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EPM9320ARC208-10 sa pamamagitan ng Altera at EPM9320RC208-15N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Altera
EPM9320ARC208-10 EPM9320ARC208-10 - MAX 9000 CPLD, 320 Macro, 10ns | Altera

EPM9320ARC208-10 - MAX 9000 CPLD, 320 Macro, 10ns | Altera

EPM9320ARC208-10 ⚠ Huling Pagbili

Pagsanggunian na paghahambing

Parametro EPM9320ARC208-10 EPM9320RC208-15N
Brand Altera Intel
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Huling Pagbili NRND
Device Family MAX 9000 —
Product Type CPLD (Complex Programmable Logic Device) —
Macrocells 320 —
Usable Gates 6,000 6,000
Pin-to-Pin Delay (tPD) 10 ns —
Maximum Frequency 144.9 MHz —
Volte ng Pagbibigay 5.0 V 5.0 V
Logic Blocks (LABs) 16 —
Programmability EEPROM, in-system programmable via JTAG —
JTAG Support IEEE Std. 1149.1 compliant —
Speed/Power Optimization Per-macrocell programmable, 50% power mode available —
Packhaging RQFP-208 (Power Quad Flat Pack) 208-pin RQFP (PowerQuad Flat Pack)
Uri ng Pagpapasok Surface Mount Surface Mount
Temperature na Operasyon [DATA_NEEDED: operating temperature range] —
Tindminan RoHS [DATA_NEEDED: RoHS compliance status] [DATA_NEEDED: RoHS status]
Family — MAX 9000
Device Type — CPLD (Complex Programmable Logic Device)
Macro Cells — 320
Flip-Flops — 484
Configurable I/O Lines — 128
Propagation Delay (tPD) — 15 ns
Maksimum na Taktiko ng Oras — 117.6 MHz
I/O Voltage Compatibility — 3.3 V or 5 V
Configuration Technology — CMOS EEPROM (non-volatile)
In-System Programmability — Yes, via IEEE Std. 1149.1 JTAG
Terminal Pitch — 0.5 mm
Hanay ng Temperature na Operasyon — 0C to +70C (commercial)
Packaging — Tray

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