EPM9320RC208-10 vs EPM9320ARC208-10 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM9320RC208-10 sa pamamagitan ng Altera at EPM9320ARC208-10 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM9320RC208-10 | EPM9320ARC208-10 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Huling Pagbili |
| Family | MAX 9000 | — |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Usable Gates | 6,000 | 6,000 |
| Macrocells | 320 | 320 |
| Logic Array Blocks (LABs) | [DATA_NEEDED: LAB count] | — |
| Packhaging | 208-pin RQFP (RC) | RQFP-208 (Power Quad Flat Pack) |
| Temperature na Operasyon | Commercial (0C to +70C) - 'C' suffix | [DATA_NEEDED: operating temperature range] |
| Volte ng Pagbibigay | 5 V | 5.0 V |
| Speed Grade | -10 | — |
| Programming Interface | JTAG (ByteBlaster/BitBlaster) | — |
| Non-volatile Configuration | Yes (EPROM/EEPROM based) | — |
| Design Tool Support | MAX+PLUS II, Quartus (legacy) | — |
| Tindminan RoHS | ROHS3 Compliant (per fpgalink listing) | [DATA_NEEDED: RoHS compliance status] |
| Level ng Sensitivity sa Asid ng Moisture (MSL) | 3 (168 Hours) | — |
| Lead Time | 1-7 days (per fpgalink listing) | — |
| Device Family | — | MAX 9000 |
| Product Type | — | CPLD (Complex Programmable Logic Device) |
| Pin-to-Pin Delay (tPD) | — | 10 ns |
| Maximum Frequency | — | 144.9 MHz |
| Logic Blocks (LABs) | — | 16 |
| Programmability | — | EEPROM, in-system programmable via JTAG |
| JTAG Support | — | IEEE Std. 1149.1 compliant |
| Speed/Power Optimization | — | Per-macrocell programmable, 50% power mode available |
| Uri ng Pagpapasok | — | Surface Mount |