EPM9320RC208-10 vs EPM9320ARC208-10N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM9320RC208-10 sa pamamagitan ng Altera at EPM9320ARC208-10N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM9320RC208-10 | EPM9320ARC208-10N |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Family | MAX 9000 | MAX 9000 |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Usable Gates | 6,000 | — |
| Macrocells | 320 | — |
| Logic Array Blocks (LABs) | [DATA_NEEDED: LAB count] | 16 |
| Packhaging | 208-pin RQFP (RC) | 208-pin RQFP (BFQFP with exposed pad) |
| Temperature na Operasyon | Commercial (0C to +70C) - 'C' suffix | 0C to +70C (Commercial) |
| Volte ng Pagbibigay | 5 V | — |
| Speed Grade | -10 | — |
| Programming Interface | JTAG (ByteBlaster/BitBlaster) | IEEE Std. 1149.1 JTAG |
| Non-volatile Configuration | Yes (EPROM/EEPROM based) | — |
| Design Tool Support | MAX+PLUS II, Quartus (legacy) | — |
| Tindminan RoHS | ROHS3 Compliant (per fpgalink listing) | Compliant (lead-free 'N' suffix) |
| Level ng Sensitivity sa Asid ng Moisture (MSL) | 3 (168 Hours) | — |
| Lead Time | 1-7 days (per fpgalink listing) | — |
| Macro Cells | — | 320 |
| Logic Gates | — | 6,000 gates |
| Propagation Delay (tPD) | — | 10 ns |
| Maximum Frequency | — | 144.9 MHz |
| Supply Voltage (VCC) | — | 5 V |
| User I/O Pins | — | 168 |
| Dedicated Input Pins | — | 12 |
| Uri ng Pagpapasok | — | Surface Mount |
| Configuration Memory | — | Non-volatile EEPROM |