EPM9320RC208-20 vs EPM9480RC208-15 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM9320RC208-20 sa pamamagitan ng Altera at EPM9480RC208-15 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM9320RC208-20 | EPM9480RC208-15 |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | MAX 9000 | MAX 9000 |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 320 | — |
| Logic Array Blocks (LABs) | 20 | — |
| Usable Gates | 6,000 | 10,000 gates |
| Maximum I/O Pins | 132 | — |
| Propagation Delay (tPD max) | 20 ns | — |
| Supply Voltage (VCCINT) | 4.75 V to 5.25 V | — |
| Programming Technology | EEPROM, in-system programmable (ISP) | — |
| Boundary-Scan Interface | IEEE Std. 1149.1 (JTAG) | — |
| Temperature na Operasyon | 0 °C to 70 °C (commercial) | -40C to +85C (commercial) |
| Packhaging | 208-RQFP, exposed pad (208-BFQFP) | RQFP-208 |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Architecture | Multiple Array Matrix (MAX), 3rd generation | Multiple Array MatriX (MAX) - 3rd generation |
| Process Technology | CMOS, 5.0 V EEPROM | — |
| Reprogrammability | Yes, unlimited ISP cycles | — |
| Logic Cells / Macro Cells | — | 480 macro cells |
| Maximum Operating Frequency | — | 117.6 MHz |
| Propagation Delay (tPD) | — | 15 ns |
| User I/O Pins | — | 153 |
| Volte ng Pagbibigay | — | 5.0 V |
| Programmability | — | In-System (ISP) via JTAG IEEE 1149.1 |
| Configuration Memory | — | EEPROM (non-volatile) |
| Tindminan RoHS | — | [DATA_NEEDED: RoHS compliance status] |
| Level ng MSL | — | [DATA_NEEDED: MSL rating] |