EPM9560ARC208-10N vs EPM9560RC208-14 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM9560ARC208-10N sa pamamagitan ng Altera at EPM9560RC208-14 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM9560ARC208-10N | EPM9560RC208-14 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | MAX 9000 | MAX 9000 |
| Macrocells | 560 | 560 |
| Usable Gates | 12,000 | 12,000 |
| User I/O Pins | 153 | 149 |
| Pin-to-Pin Delay | 10 ns | — |
| Internal Counter Frequency | 144.9 MHz | — |
| Volte ng Pagbibigay | 5 V | 5 V |
| Technology | CMOS EEPROM | — |
| Packhaging | 208-pin RQFP (PowerQuad II) | 208-pin RQFP (PQFP) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Temperature na Operasyon | 0 C to +70 C (commercial) | — |
| Configuration Memory | EEPROM (non-volatile) | — |
| In-System Programmability | Yes (JTAG ISP) | Yes (JTAG, IEEE 1149.1) |
| Logic Array Blocks (LABs) | 20 | 16 |
| Speed Grade | -10 | — |
| Tindminan RoHS | Compliant (N suffix) | Non-compliant (legacy part) |
| Lead Finish | [DATA_NEEDED: lead finish] | — |
| Level ng MSL | [DATA_NEEDED: MSL level] | — |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Maximum Operating Frequency | — | 117.6 MHz |
| Pin-to-Pin Propagation Delay | — | 14 ns |
| I/O Voltage Support | — | 3.3 V / 5 V |
| Program Memory Type | — | EEPROM (non-volatile) |
| Process Technology | — | 0.35 µm CMOS EEPROM |