EPM9560ARC240-10 vs EPM9560RC-10 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM9560ARC240-10 sa pamamagitan ng Altera at EPM9560RC-10 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM9560ARC240-10 | EPM9560RC-10 |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | MAX 9000 | MAX 9000 |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Architecture | Multiple Array MatriX (MAX) - third generation | Multiple Array Matrix (MAX) - third generation |
| Usable Gates | 12,000 | 12,000 |
| Macrocells | 560 | 560 |
| User I/Os (this package) | 191 (per Mouser listing) | — |
| Internal Frequency | 144.9 MHz | — |
| Propagation Delay (tpd) | 11.4 ns | — |
| Supply Voltage - Internal (VCCINT) | 5.0 V | — |
| I/O Supply Voltage (VCCIO) | 3.3 V or 5.0 V (selectable) | — |
| Process Technology | CMOS EEPROM | CMOS EEPROM |
| Packhaging | 240-pin PowerQuad QFP (RQFP / EAR240) | 240-pin PGA (RC suffix) |
| Temperature na Operasyon | 0C to +70C (commercial) | 0C to +70C (commercial) |
| Configuration Memory | EEPROM (non-volatile, in-system programmable) | — |
| Logic Family | CMOS | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | unknown |
| Logic Array Blocks (LABs) | — | 16 |
| Maximum User I/O Pins | — | 212 |
| Pin-to-Pin Delay (tPD) | — | 10 ns |
| Supply Voltage (VCCINT/VCCIO) | — | 5.0 V |
| In-System Programmability | — | IEEE 1149.1 JTAG |
| Uri ng Pagpapasok | — | Through-Hole / Socketed |