EPM9560ARC240-10N vs EPM9560RC-10 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM9560ARC240-10N sa pamamagitan ng Altera at EPM9560RC-10 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EPM9560ARC240-10N - MAX 9000 CPLD 560 Macro 191 IOs | Altera/Intel
EPM9560ARC240-10N ObsoletePagsanggunian na paghahambing
| Parametro | EPM9560ARC240-10N | EPM9560RC-10 |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Logic Family | MAX 9000 (CPLD) | — |
| Process Technology | CMOS EEPROM | CMOS EEPROM |
| Macro Cells | 560 | — |
| User I/Os | 191 | — |
| Logic Array Blocks (LABs) | 16 | 16 |
| Propagation Delay (tPD) | 10 ns | — |
| Internal Frequency (fMAX) | 145 MHz | — |
| Supply Voltage (VCCINT) | 5.0 V | — |
| Temperature na Operasyon | 0°C to +70°C (Commercial) | 0C to +70C (commercial) |
| Packhaging | 240-pin RQFP (32x32 mm) | 240-pin PGA (RC suffix) |
| Uri ng Pagpapasok | Surface Mount | Through-Hole / Socketed |
| Programming Interface | IEEE 1149.1 JTAG / ByteBlaster | — |
| Programmability | In-system, EEPROM-based (non-volatile) | — |
| I/O Standard | 5.0 V TTL-compatible | — |
| Tindminan RoHS | Non-RoHS (legacy Altera part) | unknown |
| Family | MAX 9000 | MAX 9000 |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Macrocells | — | 560 |
| Usable Gates | — | 12,000 |
| Maximum User I/O Pins | — | 212 |
| Pin-to-Pin Delay (tPD) | — | 10 ns |
| Supply Voltage (VCCINT/VCCIO) | — | 5.0 V |
| In-System Programmability | — | IEEE 1149.1 JTAG |
| Architecture | — | Multiple Array Matrix (MAX) - third generation |