EPM9560ARI240-10 vs EPM9560ARI240-10N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM9560ARI240-10 sa pamamagitan ng Altera at EPM9560ARI240-10N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EPM9560ARI240-10N - MAX 9000 CPLD, 560 Macrocells, 5V, 240-RQFP | Intel
EPM9560ARI240-10N NrndPagsanggunian na paghahambing
| Parametro | EPM9560ARI240-10 | EPM9560ARI240-10N |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | NRND |
| Family | MAX 9000 | MAX 9000 |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Usable Gates | 12,000 | 12,000 |
| Macro Cells | 560 | — |
| User I/O Pins | 191 | — |
| Packhaging | 240-pin RQFP (PowerQuad Flat Pack) | 240-pin RQFP (RQFP-240 / PQFP-240) |
| Pin-to-Pin Propagation Delay | 10 ns | — |
| Internal Frequency | 144.9 MHz | — |
| Volte ng Pagbibigay | 5.0 V | 5.0 V nominal (4.5 V min, 5.5 V max) |
| Technology | CMOS, EEPROM-based configuration | — |
| Hanay ng Temperature na Operasyon | -40 C to +85 C (industrial) | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Configuration Memory | EEPROM (non-volatile, instant-on) | — |
| Logic Architecture | Multiple Array MatriX (MAX) with global interconnect array | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | — |
| Moisture Sensitivity Level | [DATA_NEEDED: MSL level] | — |
| Number of Terminals | 240 | — |
| Terminal Form | Gull Wing | — |
| Product Type | — | CPLD (Complex Programmable Logic Device) |
| Macrocells | — | 560 |
| Logic Array Blocks (LABs) | — | 16 |
| User I/Os | — | 216 (per digchip); 191 (per Mouser) |
| Maximum Internal Frequency | — | 144.9 MHz (typical); 145 MHz (per digchip) |
| Propagation Delay (tPD) | — | 10 ns (-10 speed grade) |
| Logic Family | — | CMOS, EEPROM-based |
| In-System Programmability | — | Yes (5.0 V ISP via JTAG) |
| Temperature na Operasyon | — | -40C to +85C (industrial) |
| Architecture | — | Multiple Array MatriX (MAX) - 3rd generation |
| JTAG (IEEE 1149.1) | — | Yes |
| Lead-Free / RoHS | — | [DATA_NEEDED: lead-free / RoHS status not in provided data] |