EPM9560ARI240-10N vs EPM9560RC-10 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM9560ARI240-10N sa pamamagitan ng Intel at EPM9560RC-10 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EPM9560ARI240-10N - MAX 9000 CPLD, 560 Macrocells, 5V, 240-RQFP | Intel
EPM9560ARI240-10N NrndPagsanggunian na paghahambing
| Parametro | EPM9560ARI240-10N | EPM9560RC-10 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Family | MAX 9000 | MAX 9000 |
| Product Type | CPLD (Complex Programmable Logic Device) | — |
| Usable Gates | 12,000 | 12,000 |
| Macrocells | 560 | 560 |
| Logic Array Blocks (LABs) | 16 | 16 |
| User I/Os | 216 (per digchip); 191 (per Mouser) | — |
| Maximum Internal Frequency | 144.9 MHz (typical); 145 MHz (per digchip) | — |
| Propagation Delay (tPD) | 10 ns (-10 speed grade) | — |
| Volte ng Pagbibigay | 5.0 V nominal (4.5 V min, 5.5 V max) | — |
| Logic Family | CMOS, EEPROM-based | — |
| In-System Programmability | Yes (5.0 V ISP via JTAG) | IEEE 1149.1 JTAG |
| Packhaging | 240-pin RQFP (RQFP-240 / PQFP-240) | 240-pin PGA (RC suffix) |
| Uri ng Pagpapasok | Surface Mount | Through-Hole / Socketed |
| Temperature na Operasyon | -40C to +85C (industrial) | 0C to +70C (commercial) |
| Architecture | Multiple Array MatriX (MAX) - 3rd generation | Multiple Array Matrix (MAX) - third generation |
| JTAG (IEEE 1149.1) | Yes | — |
| Lead-Free / RoHS | [DATA_NEEDED: lead-free / RoHS status not in provided data] | — |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Maximum User I/O Pins | — | 212 |
| Pin-to-Pin Delay (tPD) | — | 10 ns |
| Supply Voltage (VCCINT/VCCIO) | — | 5.0 V |
| Process Technology | — | CMOS EEPROM |
| Tindminan RoHS | — | unknown |