EPM9560ARI240-10N vs EPM9560RC-10 对比
详细并排对比 EPM9560ARI240-10N 出自 Intel 和 EPM9560RC-10 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
Intel
EPM9560ARI240-10N - MAX 9000 CPLD, 560 Macrocells, 5V, 240-RQFP | Intel
EPM9560ARI240-10N Nrnd规格对比
| 参数 | EPM9560ARI240-10N | EPM9560RC-10 |
|---|---|---|
| 品牌 | Intel | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 不推荐新设计 | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $105.00 | $110.00 |
| Family | MAX 9000 | MAX 9000 |
| Product Type | CPLD (Complex Programmable Logic Device) | — |
| Usable Gates | 12,000 | 12,000 |
| Macrocells | 560 | 560 |
| Logic Array Blocks (LABs) | 16 | 16 |
| User I/Os | 216 (per digchip); 191 (per Mouser) | — |
| Maximum Internal Frequency | 144.9 MHz (typical); 145 MHz (per digchip) | — |
| Propagation Delay (tPD) | 10 ns (-10 speed grade) | — |
| 电源电压 | 5.0 V nominal (4.5 V min, 5.5 V max) | — |
| Logic Family | CMOS, EEPROM-based | — |
| In-System Programmability | Yes (5.0 V ISP via JTAG) | IEEE 1149.1 JTAG |
| 封装 | 240-pin RQFP (RQFP-240 / PQFP-240) | 240-pin PGA (RC suffix) |
| 安装类型 | Surface Mount | Through-Hole / Socketed |
| 工作温度 | -40C to +85C (industrial) | 0C to +70C (commercial) |
| Architecture | Multiple Array MatriX (MAX) - 3rd generation | Multiple Array Matrix (MAX) - third generation |
| JTAG (IEEE 1149.1) | Yes | — |
| Lead-Free / RoHS | [DATA_NEEDED: lead-free / RoHS status not in provided data] | — |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Maximum User I/O Pins | — | 212 |
| Pin-to-Pin Delay (tPD) | — | 10 ns |
| Supply Voltage (VCCINT/VCCIO) | — | 5.0 V |
| Process Technology | — | CMOS EEPROM |
| RoHS 状态 | — | unknown |