EPM9560GC280-15N vs EPM9560GI280-15 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM9560GC280-15N sa pamamagitan ng Intel at EPM9560GI280-15 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM9560GC280-15N | EPM9560GI280-15 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | NRND |
| Device Family | MAX 9000 | MAX 9000 |
| Product Type | EE PLD / CPLD | — |
| Macrocell Count | 560 | — |
| Usable Gates | 12,000 (typical) | — |
| Propagation Delay (tPD) | 16.6 ns | 11.4 ns |
| Maksimum na Taktiko ng Oras | 117.6 MHz | — |
| Supply Voltage (VCCINT/VCCIO) | 5.0 V | 4.5 V to 5.5 V (3.3 V or 5 V I/O) |
| Maximum Supply Voltage | 5.25 V | — |
| Logic Technology | CMOS EEPROM | — |
| In-System Programmability | Yes (5.0-V ISP via JTAG) | 5.0-V ISP via JTAG |
| Boundary-Scan (JTAG) | IEEE Std. 1149.1 compliant | — |
| Packhaging | CPGA-280 (Ceramic Pin Grid Array, 280 pins) | 280-pin PGA (ceramic, metal-sealed cofired) |
| Package Code | PGA / CPGA280 | — |
| Terminal Form | PIN/PEG | — |
| Operating Temperature Grade | Commercial | — |
| Architecture | Multiple Array MatriX (MAX) 3rd generation | CMOS EEPROM, third-generation Multiple Array MatriX (MAX) |
| Macrocells | — | 560 |
| Flip-Flops | — | 772 |
| User I/Os | — | 216 |
| Dedicated Inputs | — | 12 |
| Logic Elements / Gates | — | 12,000 usable gates |
| Internal Frequency (fMAX) | — | 145 MHz |
| Clock-to-Output (tCO) | — | 16.6 ns |
| Temperature na Operasyon | — | -40 °C to 85 °C (industrial) |
| Process Technology | — | CMOS EEPROM |
| Tindminan RoHS | — | [DATA_NEEDED: RoHS status] |
| Level ng Sensitivity sa Asid ng Moisture (MSL) | — | MSL-3 (168 hours) |