EPM9560RC208-3 vs EPM9560RC208-17 Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EPM9560RC208-3 sa pamamagitan ng Altera at EPM9560RC208-17 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Altera
EPM9560RC208-3 EPM9560RC208-3 - 560 Macrocell MAX 9000 EPLD | Intel / Altera

EPM9560RC208-3 - 560 Macrocell MAX 9000 EPLD | Intel / Altera

EPM9560RC208-3 ⚠ Huling Pagbili

Pagsanggunian na paghahambing

Parametro EPM9560RC208-3 EPM9560RC208-17
Brand Altera Altera
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Huling Pagbili NRND
Family MAX 9000 MAX 9000
Device Type EPLD (Erasable Programmable Logic Device) —
Macrocells 560 —
Logic Array Blocks (LABs) 16 16
Usable Gates 12,000 12,000
Maximum Operating Frequency [DATA_NEEDED: f_MAX] —
Pin-to-Pin Delay (speed grade -3) approximately 3 ns (slowest grade) —
Speed Grade -3 —
Packhaging 208-pin RQFP (Power Quad Flat Pack) 208-pin RQFP (RC208)
I/O Voltage Tolerance 5V —
Process Technology 0.5 µm CMOS EPROM —
Programming Interface ByteBlaster / BitBlaster (JTAG-compatible) —
Temperature na Operasyon [DATA_NEEDED: industrial / commercial range] —
Tindminan RoHS [DATA_NEEDED] —
Lifecycle Mature / Last-time-buy (per Altera PDN for selected MAX 9000 ordering codes) —
Product Type — CPLD (EPLD, in-system programmable)
Macro Cells — 560
Pin-to-Pin Delay (tPD) — 17 ns
Maximum Counter Frequency — 117.6 MHz
User I/O Pins — 212
Supply Voltage (VCC) — 5 V
Programming Technology — EEPROM (in-system programmable)
Program/Erase Cycles — 100 minimum
JTAG (IEEE 1149.1) Support — Yes
Architecture — Third-generation MAX (AND-OR PLA)
Uri ng Pagpapasok — Surface Mount

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