EPM9560RC240-12 vs EPM9560ARC240-10 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM9560RC240-12 sa pamamagitan ng Altera at EPM9560ARC240-10 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM9560RC240-12 | EPM9560ARC240-10 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | MAX 9000 (EPM9560) | MAX 9000 |
| Device Type | EE PLD / CPLD | CPLD (Complex Programmable Logic Device) |
| Macrocells | 560 | 560 |
| Flip-Flops | 772 | — |
| User I/O Pins | 191 | — |
| Logic Array Blocks (LABs) | 20 | — |
| Maximum Propagation Delay (tPD) | 13.4 ns | — |
| Speed Grade | -12 (13.4 ns tPD) | — |
| Maximum Operating Frequency (estimated) | ~76 MHz registered | — |
| Core Supply Voltage (VCCINT) | 5 V | — |
| I/O Logic Levels | 3.3 V or 5 V (configurable) | — |
| Packhaging | PQFP-240 (RC240) 0.500 mm pitch, gull-wing | 240-pin PowerQuad QFP (RQFP / EAR240) |
| Uri ng Pagpapasok | Surface Mount | — |
| Configuration Memory | EEPROM (non-volatile) | EEPROM (non-volatile, in-system programmable) |
| Programming Interface | IEEE 1149.1 JTAG | — |
| Process Technology | CMOS | CMOS EEPROM |
| Temperature na Operasyon | [DATA_NEEDED: operating temperature grade] | 0C to +70C (commercial) |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS status] |
| Architecture | — | Multiple Array MatriX (MAX) - third generation |
| Usable Gates | — | 12,000 |
| User I/Os (this package) | — | 191 (per Mouser listing) |
| Internal Frequency | — | 144.9 MHz |
| Propagation Delay (tpd) | — | 11.4 ns |
| Supply Voltage - Internal (VCCINT) | — | 5.0 V |
| I/O Supply Voltage (VCCIO) | — | 3.3 V or 5.0 V (selectable) |
| Logic Family | — | CMOS |