EPM9560RC240-15YY vs EPM9560RC240-12 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM9560RC240-15YY sa pamamagitan ng Intel at EPM9560RC240-12 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM9560RC240-15YY | EPM9560RC240-12 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Family | MAX 9000A | MAX 9000 (EPM9560) |
| Logic Type | CMOS EEPROM-based CPLD | — |
| Number of Macrocells | 560 | — |
| Usable Gates | 12,000 | — |
| Number of User I/O | 191 | — |
| Maximum Operating Frequency | 117.6 MHz | — |
| Propagation Delay (tpd) | 15 ns | — |
| Supply Voltage (VCC) | 5.0 V | — |
| Programmability | In-system via IEEE 1149.1 (JTAG) | — |
| Package Type | RQFP-240 (Plastic Quad Flat Pack) | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Temperature na Operasyon | 0 C to +70 C (commercial) | [DATA_NEEDED: operating temperature grade] |
| Speed Grade | -15 | -12 (13.4 ns tPD) |
| Logic Array Blocks (LABs) | [DATA_NEEDED: LAB count for EPM9560] | 20 |
| Tindminan RoHS | Non-RoHS (YY suffix indicates non-compliant / matte tin or SnPb lead finish per Altera legacy convention) | [DATA_NEEDED: RoHS compliance] |
| Device Type | — | EE PLD / CPLD |
| Macrocells | — | 560 |
| Flip-Flops | — | 772 |
| User I/O Pins | — | 191 |
| Maximum Propagation Delay (tPD) | — | 13.4 ns |
| Maximum Operating Frequency (estimated) | — | ~76 MHz registered |
| Core Supply Voltage (VCCINT) | — | 5 V |
| I/O Logic Levels | — | 3.3 V or 5 V (configurable) |
| Packhaging | — | PQFP-240 (RC240) 0.500 mm pitch, gull-wing |
| Configuration Memory | — | EEPROM (non-volatile) |
| Programming Interface | — | IEEE 1149.1 JTAG |
| Process Technology | — | CMOS |