EPM9560RC304-10 vs EPM9560RC304-2 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM9560RC304-10 sa pamamagitan ng Intel at EPM9560RC304-2 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EPM9560RC304-2 - MAX 9000 EPLD 12k Gates 304-pin RQFP | Intel / Altera
EPM9560RC304-2 ObsoletePagsanggunian na paghahambing
| Parametro | EPM9560RC304-10 | EPM9560RC304-2 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Family | MAX 9000 | MAX 9000 |
| Device Type | CPLD / EPLD | CPLD (EPLD - Erasable PLD) |
| Macrocells | 560 | [DATA_NEEDED: macrocell count] |
| Usable Gates | 16000 | Approximately 12,000 |
| Logic Elements | 560 | — |
| Packhaging | RQFP-304 (RC) | 304-pin RQFP (RC) |
| Bilang ng Pin | 304 | — |
| Pin-to-Pin Propagation Delay | 12 ns | — |
| Speed Grade | -10 | -2 |
| Volte ng Pagbibigay | 5 V | — |
| Temperature na Operasyon | [DATA_NEEDED: operating temperature range] | Commercial (0C to +70C) |
| User I/O Pins | 304 (package-limited) | 304 |
| JTAG / Boundary Scan | IEEE 1149.1 compliant | — |
| Programming Method | JTAG in-system (ISP) | — |
| Process Technology | 0.65 µm CMOS EEPROM | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Level ng MSL | 3 (168 Hours) | — |
| Tindminan RoHS | ROHS3 Compliant | [DATA_NEEDED: RoHS compliance status] |
| Logic Array Blocks (LABs) | — | 16 |
| Core Supply Voltage | — | 5.0 V |
| I/O Supply Voltage | — | 5.0 V |
| Programming Technology | — | EEPROM (in-system programmable) |
| JTAG Support | — | IEEE Std. 1149.1 (boundary-scan + ISP) |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |
| Architecture | — | Multiple Array MatriX (MAX) - third generation |
| Configuration Memory | — | On-chip EEPROM (non-volatile) |