EPM9560RC304-2 vs EPM9560RC304-15 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM9560RC304-2 sa pamamagitan ng Intel at EPM9560RC304-15 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EPM9560RC304-2 - MAX 9000 EPLD 12k Gates 304-pin RQFP | Intel / Altera
EPM9560RC304-2 ObsoletePagsanggunian na paghahambing
| Parametro | EPM9560RC304-2 | EPM9560RC304-15 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | MAX 9000 | — |
| Device Type | CPLD (EPLD - Erasable PLD) | — |
| Usable Gates | Approximately 12,000 | — |
| Logic Array Blocks (LABs) | 16 | 16 |
| Macrocells | [DATA_NEEDED: macrocell count] | 560 |
| User I/O Pins | 304 | 212 (maximum) |
| Packhaging | 304-pin RQFP (RC) | 304-pin RQFP (Plastic Quad Flat Pack) |
| Speed Grade | -2 | — |
| Core Supply Voltage | 5.0 V | — |
| I/O Supply Voltage | 5.0 V | — |
| Programming Technology | EEPROM (in-system programmable) | — |
| JTAG Support | IEEE Std. 1149.1 (boundary-scan + ISP) | — |
| Temperature na Operasyon | Commercial (0C to +70C) | [DATA_NEEDED: industrial/commercial temperature grade] |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: lead-free / RoHS compliance status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Architecture | Multiple Array MatriX (MAX) - third generation | Multiple Array MatriX (MAX), EEPROM-based |
| Configuration Memory | On-chip EEPROM (non-volatile) | On-chip EEPROM (non-volatile) |
| Device Family | — | MAX 9000 |
| Propagation Delay (tPD) | — | 15 ns (combinatorial, pin-to-pin) |
| Bilang ng Pin | — | 304 |
| Supply Voltage (VCCINT) | — | 5.0 V |
| I/O Standard | — | 5.0 V TTL / PCI-compliant |
| In-System Programmability | — | Yes, via IEEE Std. 1149.1 JTAG |
| Technology Node | — | High-performance CMOS, EEPROM process |