EPM9560RC304-2N vs EPM9560RC304-15C Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM9560RC304-2N sa pamamagitan ng Intel at EPM9560RC304-15C sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EPM9560RC304-15C - 560 Macro Cell MAX 9000 CPLD 117.6MHz 5V | Altera
EPM9560RC304-15C ObsoletePagsanggunian na paghahambing
| Parametro | EPM9560RC304-2N | EPM9560RC304-15C |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | MAX 9000 | MAX 9000 |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macrocells | 560 | — |
| Usable Gates | 12,000 | 12,000 |
| Logic Array Blocks (LABs) | [DATA_NEEDED: LAB count] | 16 |
| Maximum User I/O | [DATA_NEEDED: user I/O count] | — |
| Packhaging | RQFP/RBGA-class 304-pin plastic carrier (RC304) | 304-pin RQFP |
| Speed Grade | -2 (mid-band) | — |
| Propagation Delay (tPD) | [DATA_NEEDED: tPD value in ns] | — |
| Supply Voltage (VCCINT) | 5.0 V | — |
| I/O Voltage Tolerance | 5.0 V (3.3 V with level shifting) | — |
| Programming Technology | EPROM/EEPROM, non-volatile | — |
| In-System Programming | IEEE 1149.1 JTAG | — |
| Temperature na Operasyon | 0C to +70C (commercial) | 0 C to +70 C (Commercial) |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Level ng MSL | [DATA_NEEDED: MSL rating] | — |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Architecture | — | Multiple Array MatriX (MAX), 3rd generation |
| Macro Cells | — | 560 |
| User I/O Pins (maximum) | — | 212 |
| Maximum Operating Frequency | — | 117.6 MHz |
| Pin-to-Pin Propagation Delay (tPD) | — | 15 ns |
| Volte ng Pagbibigay | — | 5.0 V |
| Process Technology | — | CMOS EEPROM |
| In-System Programmability | — | Yes (IEEE 1149.1 JTAG) |
| Program/Erase Endurance | — | 100 cycles minimum |