EPM9560RI205-15 vs EPM9560RI208-15N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM9560RI205-15 sa pamamagitan ng Altera at EPM9560RI208-15N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM9560RI205-15 | EPM9560RI208-15N |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | MAX 9000 | — |
| Device | EPM9560 | — |
| Logic Capacity | 6,000 usable gates | — |
| Macrocells | 212 | — |
| Logic Array Blocks (LABs) | 20 | — |
| Maximum User I/O Pins | 164 | — |
| Speed Grade | -15 (15 ns pin-to-pin delay) | -15 |
| Propagation Delay (tpd) | 15 ns | — |
| Packhaging | RQFP-205 (PowerQuad4) | 208-pin RQFP (Ruggedized Quad Flat Pack) |
| Supply Voltage (VCC) | 5.0 V | — |
| Technology | CMOS EEPROM | — |
| In-System Programmability | Yes (IEEE 1149.1 JTAG) | — |
| Temperature na Operasyon | -40 C to +85 C (industrial) | 0C to 70C (Commercial) |
| Uri ng Pagpapasok | Surface Mount | — |
| Tindminan RoHS | [DATA_NEEDED: rohs_compliance] | [DATA_NEEDED: RoHS status] |
| Manufacturer | — | Altera (Intel Programmable Solutions Group) |
| Device Family | — | MAX 9000 |
| Device Type | — | EPLD (Erasable Programmable Logic Device) |
| Architecture | — | Multiple Array MatriX (MAX), 3rd generation |
| Configuration Memory | — | CMOS EEPROM, in-system programmable |
| Total Pins | — | 356 (per third-party catalog; see _validation_note) |
| Package Pin Count | — | 208 |
| Terminal Form | — | Gull Wing |
| Package Code | — | HFQFP |
| User I/Os | — | 216 (per DigiChip specification; see _validation_note) |
| Maximum Internal Frequency | — | 145 MHz |
| Propagation Delay (tPD) | — | 11.4 ns (15 ns speed grade) |
| Volte ng Pagbibigay | — | 5.0 V |
| Temperature Grade | — | Industrial (per Vyrian/Partstack listings) |
| Logic Family | — | CMOS |
| Programming Interface | — | IEEE 1149.1 JTAG, 5.0-V in-system |