EPM9560RI208-10 vs EPM9560RI208-20 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM9560RI208-10 sa pamamagitan ng Intel at EPM9560RI208-20 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM9560RI208-10 | EPM9560RI208-20 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | NRND |
| Family | MAX 9000 | MAX 9000 |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Usable Gates | 12,000 | 12,000 |
| Macrocells | 560 | — |
| Logic Array Blocks (LABs) | [DATA_NEEDED: LAB count] | 16 |
| Pin-to-Pin Delay (tPD) | 10 ns | — |
| Maximum Counter Frequency | 144 MHz | — |
| Supply Voltage (VCCINT) | 5.0 V | — |
| User I/O Pins | 212 (typical for 208-RQFP package) | — |
| Packhaging | 208-pin RQFP (Power Quad Flat Pack) | 208-pin RQFP (Power-Quad Flat Pack) 28x28 mm |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Temperature na Operasyon | -40 °C to +85 °C (Industrial) | [DATA_NEEDED: operating temperature range grade] |
| Programming Interface | IEEE 1149.1 (JTAG) / ISP | — |
| Configuration Memory | EEPROM, 100 erase/program cycles | — |
| Tindminan RoHS | ROHS3 Compliant | [DATA_NEEDED: RoHS compliance status] |
| Level ng Sensitivity sa Asid ng Moisture (MSL) | 3 (168 Hours) | — |
| Lead Time | 1-7 days (per fpgalink listing) | — |
| Architecture | — | Multiple Array MatriX (MAX) - third generation |
| Macro Cells | — | 560 |
| Maximum User I/O Pins | — | 212 |
| Pin-to-Pin Propagation Delay (tPD) | — | 20 ns |
| Counter Frequency (fCNT) | — | 100 MHz |
| Supply Voltage (VCC) | — | 5.0 V |
| Process Technology | — | CMOS EEPROM |
| In-System Programmability | — | Yes (IEEE Std. 1149.1 JTAG) |