EPM9560RI208-10N vs EPM9560RI208-15 Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EPM9560RI208-10N sa pamamagitan ng Altera at EPM9560RI208-15 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EPM9560RI208-10N EPM9560RI208-15
Brand Altera Intel
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Obsolete NRND
Family MAX 9000 MAX 9000
Device Type CPLD (Complex Programmable Logic Device) —
Architecture CMOS EEPROM-based Multiple Array MatriX (MAX) CMOS EEPROM-based Multiple Array MatriX (MAX)
Usable Gates 12,000 —
Macro Cells 560 —
Register Bits 12,160 —
User I/Os 212 153
Pin-to-Pin Delay 10 ns (speed grade -10) —
Maximum Frequency 100 MHz to 125 MHz —
Volte ng Pagbibigay 5 V —
Packhaging 208-pin RQFP (PQFP) —
Temperature na Operasyon -40C to +85C (Industrial grade, "RI" suffix) 0 °C to 70 °C (industrial grade; per package suffix R)
Programming Method In-system via IEEE 1149.1 (JTAG) —
Level ng MSL 3 (168 Hours) —
Tindminan RoHS ROHS3 Compliant (per fpgalink) ROHS3 Compliant
Configuration Memory On-chip EEPROM (non-volatile) On-chip EEPROM (non-volatile)
Macrocells — 560
Typical Usable Gates — 12,000
Internal Frequency (max) — 145 MHz
Propagation Delay (tPD) — 11.4 ns (commercial); 15 ns speed grade
Logic Family — CMOS
Bilang ng Pins — 208
Package Code — HFQFP (Power Quad Flat Pack, gull-wing)
Package Type — RQFP-208
Supply Voltage (VCC) — 5 V nominal (4.5 V to 5.5 V)
I/O Voltage Support — 3.3 V or 5 V multi-volt I/O
In-System Programmability — Yes (JTAG / IEEE 1149.1)
Boundary-Scan (JTAG) — Compliant
Level ng Sensitivity sa Asid ng Moisture (MSL) — 3 (168 hours)

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