EPM9560RI208-20W vs EPM9560RI208-20 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM9560RI208-20W sa pamamagitan ng Intel at EPM9560RI208-20 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM9560RI208-20W | EPM9560RI208-20 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | NRND |
| Family | MAX 9000 | MAX 9000 |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Usable Gates | 12,000 | 12,000 |
| Macrocells | 560 | — |
| Logic Array Blocks (LABs) | 16 LABs of 40 macrocells each | 16 |
| User I/O Pins | 212 | — |
| Pin-to-Pin Delay (tPD) | 20 ns | — |
| Counter Frequency (fCNT) | 100 MHz | 100 MHz |
| Speed Grade | -20 | — |
| Volte ng Pagbibigay | 5.0 V | — |
| In-System Programmability | Yes (IEEE 1149.1 JTAG) | Yes (IEEE Std. 1149.1 JTAG) |
| Programming Technology | CMOS EEPROM | — |
| Packhaging | 208-pin RQFP (Power Quad Flat Pack) | 208-pin RQFP (Power-Quad Flat Pack) 28x28 mm |
| Temperature na Operasyon | -40C to +85C (Industrial) | [DATA_NEEDED: operating temperature range grade] |
| Architecture | Third-generation Multiple Array MatriX (MAX) | Multiple Array MatriX (MAX) - third generation |
| Macro Cells | — | 560 |
| Maximum User I/O Pins | — | 212 |
| Pin-to-Pin Propagation Delay (tPD) | — | 20 ns |
| Supply Voltage (VCC) | — | 5.0 V |
| Process Technology | — | CMOS EEPROM |
| Tindminan RoHS | — | [DATA_NEEDED: RoHS compliance status] |
| Uri ng Pagpapasok | — | Surface Mount |