EPM9560RI240-20N vs EPM9560RI240-20C Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM9560RI240-20N sa pamamagitan ng Intel at EPM9560RI240-20C sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EPM9560RI240-20N - MAX 9000 CPLD, 560 Macro, 191 I/O | Intel
EPM9560RI240-20N ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EPM9560RI240-20N | EPM9560RI240-20C |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | NRND |
| Family | MAX 9000 | MAX 9000 |
| Architecture | Multiple Array MatriX (MAX) - third generation | — |
| Macrocells | 560 | 560 |
| Logic Array Blocks (LABs) | 12 | — |
| User I/Os | 191 | 191 |
| Maximum Internal Frequency | 145 MHz | — |
| Pin-to-Pin Propagation Delay (tPD) | 11.4 ns | — |
| Logic Family | CMOS | — |
| Process Technology | CMOS EEPROM | CMOS, EEPROM-based |
| Programmability | In-system programmable (ISP) via JTAG (IEEE 1149.1) | — |
| Core Supply Voltage | 5.0 V | — |
| MultiVolt I/O | 5.0 V / 3.3 V compatible | — |
| Packhaging | 240-pin Power-enhanced BGA (RI240) | 240-pin RQFP (Power Quad Flat Pack) |
| Temperature na Operasyon | 0C to +70C (commercial) | 0°C to +70°C (commercial grade) |
| Programming Language Support | AHDL, VHDL, Verilog HDL | — |
| Development Tools | MAX+PLUS II, Quartus II | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance] | — |
| Device Type | — | EE PLD (CPLD) |
| Usable Gates | — | 12,000 |
| Internal Operating Frequency | — | 100 MHz |
| Propagation Delay (tPD) | — | 20 ns (speed grade -20) |
| Supply Voltage (VCCINT) | — | 5 V |
| I/O Voltage | — | 3.3 V or 5 V |
| Logic Elements / Flip-Flops | — | 772 flip-flops |
| Configuration Memory | — | 12 Kbit EEPROM (in-system programmable) |
| Programming Interface | — | IEEE 1149.1 JTAG BST |