EPM9560RI240-20N vs EPM9560RI240-20C 对比

详细并排对比 EPM9560RI240-20N 出自 Intel 和 EPM9560RI240-20C 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Intel
EPM9560RI240-20N EPM9560RI240-20N - MAX 9000 CPLD, 560 Macro, 191 I/O | Intel

EPM9560RI240-20N - MAX 9000 CPLD, 560 Macro, 191 I/O | Intel

EPM9560RI240-20N ⚠ 最后一次采购

规格对比

参数 EPM9560RI240-20N EPM9560RI240-20C
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 最后采购期 不推荐新设计
库存状态 有库存 有库存
单价(USD) $195.00 $52.10
Family MAX 9000 MAX 9000
Architecture Multiple Array MatriX (MAX) - third generation —
Macrocells 560 560
Logic Array Blocks (LABs) 12 —
User I/Os 191 191
Maximum Internal Frequency 145 MHz —
Pin-to-Pin Propagation Delay (tPD) 11.4 ns —
Logic Family CMOS —
Process Technology CMOS EEPROM CMOS, EEPROM-based
Programmability In-system programmable (ISP) via JTAG (IEEE 1149.1) —
Core Supply Voltage 5.0 V —
MultiVolt I/O 5.0 V / 3.3 V compatible —
封装 240-pin Power-enhanced BGA (RI240) 240-pin RQFP (Power Quad Flat Pack)
工作温度 0C to +70C (commercial) 0°C to +70°C (commercial grade)
Programming Language Support AHDL, VHDL, Verilog HDL —
Development Tools MAX+PLUS II, Quartus II —
RoHS 状态 [DATA_NEEDED: RoHS compliance] —
Device Type — EE PLD (CPLD)
Usable Gates — 12,000
Internal Operating Frequency — 100 MHz
Propagation Delay (tPD) — 20 ns (speed grade -20)
Supply Voltage (VCCINT) — 5 V
I/O Voltage — 3.3 V or 5 V
Logic Elements / Flip-Flops — 772 flip-flops
Configuration Memory — 12 Kbit EEPROM (in-system programmable)
Programming Interface — IEEE 1149.1 JTAG BST

数据手册与资源

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