EPM9560RZ208-15 vs EPM9560RI208-15 Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EPM9560RZ208-15 sa pamamagitan ng Altera at EPM9560RI208-15 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EPM9560RZ208-15 EPM9560RI208-15
Brand Altera Intel
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Obsolete NRND
Family MAX 9000 MAX 9000
Device Type EPLD (Erasable Programmable Logic Device) —
Macrocells 560 560
Usable Gates 12,000 —
Logic Array Blocks (LABs) 16 —
User I/O Pins (max) 212 —
Packhaging RQFP-208 (PowerQuad QFP) —
Speed Grade -15 (15 ns pin-to-pin delay) —
Process Technology 0.35 µm CMOS EEPROM —
Operating Voltage (Core) 5.0 V —
Programmability In-System Programmable (ISP) via JTAG —
Maximum Toggle Frequency [DATA_NEEDED: fmax] —
Pin-to-Pin Delay (tPD) 15 ns —
Uri ng Pagpapasok Surface Mount —
Temperature na Operasyon [DATA_NEEDED: temperature range] 0 °C to 70 °C (industrial grade; per package suffix R)
Tindminan RoHS [DATA_NEEDED: RoHS] ROHS3 Compliant
Architecture — CMOS EEPROM-based Multiple Array MatriX (MAX)
Typical Usable Gates — 12,000
User I/Os — 153
Internal Frequency (max) — 145 MHz
Propagation Delay (tPD) — 11.4 ns (commercial); 15 ns speed grade
Logic Family — CMOS
Bilang ng Pins — 208
Package Code — HFQFP (Power Quad Flat Pack, gull-wing)
Package Type — RQFP-208
Supply Voltage (VCC) — 5 V nominal (4.5 V to 5.5 V)
I/O Voltage Support — 3.3 V or 5 V multi-volt I/O
In-System Programmability — Yes (JTAG / IEEE 1149.1)
Boundary-Scan (JTAG) — Compliant
Configuration Memory — On-chip EEPROM (non-volatile)
Level ng Sensitivity sa Asid ng Moisture (MSL) — 3 (168 hours)

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