EPM9560RZ208-15 vs EPM9560RI208-15 比較
詳細並排比較 EPM9560RZ208-15 由 Altera 與 EPM9560RI208-15 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM9560RZ208-15 | EPM9560RI208-15 |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | NRND |
| Family | MAX 9000 | MAX 9000 |
| Device Type | EPLD (Erasable Programmable Logic Device) | — |
| Macrocells | 560 | 560 |
| Usable Gates | 12,000 | — |
| Logic Array Blocks (LABs) | 16 | — |
| User I/O Pins (max) | 212 | — |
| 封裝 | RQFP-208 (PowerQuad QFP) | — |
| Speed Grade | -15 (15 ns pin-to-pin delay) | — |
| Process Technology | 0.35 µm CMOS EEPROM | — |
| Operating Voltage (Core) | 5.0 V | — |
| Programmability | In-System Programmable (ISP) via JTAG | — |
| Maximum Toggle Frequency | [DATA_NEEDED: fmax] | — |
| Pin-to-Pin Delay (tPD) | 15 ns | — |
| 安裝類型 | Surface Mount | — |
| 工作溫度 | [DATA_NEEDED: temperature range] | 0 °C to 70 °C (industrial grade; per package suffix R) |
| RoHS 狀態 | [DATA_NEEDED: RoHS] | ROHS3 Compliant |
| Architecture | — | CMOS EEPROM-based Multiple Array MatriX (MAX) |
| Typical Usable Gates | — | 12,000 |
| User I/Os | — | 153 |
| Internal Frequency (max) | — | 145 MHz |
| Propagation Delay (tPD) | — | 11.4 ns (commercial); 15 ns speed grade |
| Logic Family | — | CMOS |
| 腳位數 | — | 208 |
| Package Code | — | HFQFP (Power Quad Flat Pack, gull-wing) |
| Package Type | — | RQFP-208 |
| Supply Voltage (VCC) | — | 5 V nominal (4.5 V to 5.5 V) |
| I/O Voltage Support | — | 3.3 V or 5 V multi-volt I/O |
| In-System Programmability | — | Yes (JTAG / IEEE 1149.1) |
| Boundary-Scan (JTAG) | — | Compliant |
| Configuration Memory | — | On-chip EEPROM (non-volatile) |
| 濕度敏感等級 (MSL) | — | 3 (168 hours) |