EPM9560SRC240-15 vs EPM9560RI240-15 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM9560SRC240-15 sa pamamagitan ng Altera at EPM9560RI240-15 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EPM9560RI240-15 - 560-Macrocell MAX 9000 CPLD, 15ns, RQFP-240 | Intel
EPM9560RI240-15 ObsoletePagsanggunian na paghahambing
| Parametro | EPM9560SRC240-15 | EPM9560RI240-15 |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Family | MAX 9000 | MAX 9000 |
| Device Type | EPLD / CPLD (Complex Programmable Logic Device) | — |
| Usable Gates | 560 | — |
| Logic Array Blocks (LABs) | 16 | — |
| Macrocells | 212 | 560 |
| Maximum User I/O Pins | [DATA_NEEDED: exact I/O count for SRC240 package] | — |
| Speed Grade | -15 (15 ns tPD) | — |
| Pin-to-Pin Logic Delay (tPD) | 15 ns (max) | — |
| Supply Voltage (VCC) | 5 V (nominal) | — |
| Programmability | In-system programmable via IEEE 1149.1 JTAG | — |
| Non-volatile | Yes (EPROM/EEPROM cells) | — |
| Packhaging | RQFP-240 (Surface Mount) | RQFP-240 (Power Quad Flat Pack, gull-wing, 0.500 mm pitch) |
| Temperature na Operasyon | [DATA_NEEDED: commercial 0-70C or industrial -40-85C] | -40 C to +85 C (industrial) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance not stated in provided data] | — |
| Process Technology | CMOS EPROM | — |
| Product Type | — | EE PLD (Electrically Erasable Programmable Logic Device) |
| Flip-Flops | — | 772 |
| User I/Os (industrial grade) | — | 191 |
| Dedicated Inputs | — | 4 |
| Propagation Delay (tPD) | — | 15 ns (speed grade -15) |
| Internal Frequency (max) | — | 145 MHz |
| Logic Family / Process | — | CMOS, EEPROM-based |
| Core Voltage | — | 5.0 V |
| I/O Voltage | — | 3.3 V or 5.0 V (configurable) |
| Architecture | — | Multiple Array MatriX (MAX), 3rd generation |
| In-System Programmability | — | Yes, JTAG (IEEE Std 1149.1) |
| Power-Up Configuration | — | Instant-on (no external boot PROM) |
| I/O Undershoot Tolerance | — | -2.0 V for <20 ns (no-load) |
| I/O Overshoot Tolerance | — | 7.0 V for <20 ns (no-load) |