LTC2256CUJ-14 vs LTC2260CUJ-14 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng LTC2256CUJ-14 sa pamamagitan ng Analog Devices at LTC2260CUJ-14 sa pamamagitan ng Analog Devices. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Analog Devices
LTC2256CUJ-14 - 14-Bit 25Msps Ultralow Power 1.8V ADC | ADI
LTC2256CUJ-14 ✓ NakahandaAnalog Devices
LTC2260CUJ-14 - 14-Bit 105Msps Ultra-Low Power 1.8V ADC | Analog Devices
LTC2260CUJ-14 ✓ NakahandaPagsanggunian na paghahambing
| Parametro | LTC2256CUJ-14 | LTC2260CUJ-14 |
|---|---|---|
| Brand | Analog Devices | Analog Devices |
| Kategorya | ADC/DAC | ADC/DAC |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Pangangasiwaan | 14 bit | 14 bit |
| Sample Rate | 25 Msps | — |
| Number of Inputs | 1 | 1 |
| Architecture | Pipelined | Pipelined |
| Volte ng Pagbibigay | 1.8 V (single) | — |
| Power Dissipation | 35 mW at 25 Msps | 130 mW (typical at 105 Msps) |
| INL | ±1 LSB (typical) | — |
| DNL | ±0.3 LSB (typical) | — |
| Transition Noise | 1.13 LSB RMS | 1.2 LSB RMS |
| SNR | 73 dB | — |
| Input Bandwidth (Full Power) | 800 MHz | — |
| Input Range | 1 Vp-p to 2 Vp-p (selectable, differential) | — |
| Digital Output Modes | Full-rate CMOS, DDR CMOS, DDR LVDS (selectable) | — |
| Output Supply Range (CMOS) | 1.2 V to 1.8 V | — |
| Packhaging | 40-QFN (6 mm x 6 mm) | 40-QFN (6x6 mm) with exposed pad |
| Pin/Package Code | UJ (QFN-40, 6x6 mm) | — |
| Configuration Interface | Serial SPI port | Serial SPI |
| Power-Saving Modes | Nap mode, full shutdown | Shutdown and Nap |
| Optional Features | Clock duty-cycle stabilizer, data output randomizer | — |
| Temperature na Operasyon | 0C to +70C (commercial C-grade) | — |
| Uri ng Pagpapasok | Surface Mount | — |
| Tindminan RoHS | Compliant (PBF suffix) | Compliant |
| Rate ng Pagkupita | — | 105 Msps |
| Input Type | — | Single-ended / Differential |
| Analog Supply Voltage | — | 1.8 V (typical) |
| Output Supply Voltage | — | 1.2 V to 1.8 V |
| INL (typical) | — | ±1 LSB |
| DNL (typical) | — | ±0.3 LSB |
| Output Interface | — | CMOS / DDR CMOS / DDR LVDS |
| Operating Temperature Range (C grade) | — | 0°C to +70°C |
| Clock Duty Cycle Stabilizer | — | Optional, user-selectable |