LTC2257CUJ-12 vs LTC2256CUJ-14 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng LTC2257CUJ-12 sa pamamagitan ng Analog Devices at LTC2256CUJ-14 sa pamamagitan ng Analog Devices. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Analog Devices
LTC2257CUJ-12 - 12-Bit 40Msps Ultralow Power 1.8V ADC | Analog Devices
LTC2257CUJ-12 ✓ NakahandaAnalog Devices
LTC2256CUJ-14 - 14-Bit 25Msps Ultralow Power 1.8V ADC | ADI
LTC2256CUJ-14 ✓ NakahandaPagsanggunian na paghahambing
| Parametro | LTC2257CUJ-12 | LTC2256CUJ-14 |
|---|---|---|
| Brand | Analog Devices | Analog Devices |
| Kategorya | ADC/DAC | ADC/DAC |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Pangangasiwaan | 12 bits | 14 bit |
| Sample Rate | 40 Msps | 25 Msps |
| Architecture | Pipelined, 1 channel | Pipelined |
| Supply Voltage (Analog) | 1.8 V (single) | — |
| Supply Voltage (Digital Output) | 1.2 V to 1.8 V (separate rail) | — |
| Power Dissipation | 79 mW at 40 Msps | 35 mW at 25 Msps |
| Input Range | 1 V P-P to 2 V P-P (selectable) | 1 Vp-p to 2 Vp-p (selectable, differential) |
| Input Bandwidth | 800 MHz full-power | — |
| INL (Typical) | +/-0.3 LSB | — |
| DNL (Typical) | +/-0.1 LSB | — |
| Transition Noise | 0.3 LSB RMS | 1.13 LSB RMS |
| Missing Codes | None over temperature | — |
| Output Formats | CMOS, DDR CMOS, DDR LVDS (selectable) | — |
| Temperature na Operasyon | -40C to +85C | 0C to +70C (commercial C-grade) |
| Packhaging | 40-QFN (6 mm x 6 mm) | 40-QFN (6 mm x 6 mm) |
| Configuration Interface | SPI serial port | Serial SPI port |
| Special Features | Clock duty-cycle stabilizer, output randomizer, shutdown and nap modes | — |
| Number of Inputs | — | 1 |
| Volte ng Pagbibigay | — | 1.8 V (single) |
| INL | — | ±1 LSB (typical) |
| DNL | — | ±0.3 LSB (typical) |
| SNR | — | 73 dB |
| Input Bandwidth (Full Power) | — | 800 MHz |
| Digital Output Modes | — | Full-rate CMOS, DDR CMOS, DDR LVDS (selectable) |
| Output Supply Range (CMOS) | — | 1.2 V to 1.8 V |
| Pin/Package Code | — | UJ (QFN-40, 6x6 mm) |
| Power-Saving Modes | — | Nap mode, full shutdown |
| Optional Features | — | Clock duty-cycle stabilizer, data output randomizer |
| Uri ng Pagpapasok | — | Surface Mount |
| Tindminan RoHS | — | Compliant (PBF suffix) |