MIMXRT1064CVL5A vs MIMXRT1061CVL5B Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng MIMXRT1064CVL5A sa pamamagitan ng NXP Semiconductors at MIMXRT1061CVL5B sa pamamagitan ng NXP Semiconductors. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
NXP Semiconductors
MIMXRT1064CVL5A - 528MHz Cortex-M7 MCU 4MB Flash | NXP i.MX RT1064
MIMXRT1064CVL5A NrndNXP Semiconductors
MIMXRT1061CVL5B - 600MHz Cortex-M7 Crossover MCU | NXP
MIMXRT1061CVL5B ✓ NakahandaPagsanggunian na paghahambing
| Parametro | MIMXRT1064CVL5A | MIMXRT1061CVL5B |
|---|---|---|
| Brand | NXP Semiconductors | NXP Semiconductors |
| Kategorya | Microcontrollers | Microcontrollers |
| Katayuan ng Lifecycle | NRND | Aktibo |
| Core Architecture | Arm Cortex-M7 | ARM Cortex-M7 |
| Maximum CPU Frequency | 528 MHz | — |
| FPU | Single-precision + Double-precision | Double-precision IEEE 754 |
| On-chip Flash | 4 MB | — |
| On-chip SRAM | 1 MB | — |
| Packhaging | 196-LFBGA | — |
| Uri ng Pagpapasok | Surface Mount | — |
| Volte ng Pagbibigay | 0.9 V to 1.3 V core / 3.0 V to 3.6 V IO | — |
| Hanay ng Temperature na Operasyon | -40C to +105C (industrial) | -40C to +105C (Industrial) |
| USB | 2x USB 2.0 OTG with integrated PHY | — |
| Ethernet | 10/100 Mbit MAC | — |
| LCD Controller | Up to WXGA resolution, 24-bit parallel | — |
| Camera Interface | 8/16-bit CSI | — |
| CAN | 2x FlexCAN | — |
| LFBGA Ball Count | 196 | — |
| Tindminan RoHS | Compliant | Compliant |
| Lifecycle | NRND (Not Recommended for New Designs) | — |
| Maximum Core Frequency | — | 528 MHz |
| Core Count | — | 1 |
| Bit Width | — | 32-bit |
| Operating Voltage (Vcc/Vdd) | — | 3.0 V to 3.6 V |
| On-Chip SRAM | — | 1 MB |
| Package Type | — | 196-MAPBGA (10x10 mm) |
| Style ng Pagpapasok | — | Surface Mount |
| Series | — | i.MX RT1060 |
| ADC Resolution | — | 12-bit |
| ADC Channels | — | 20 |
| External Memory Interfaces | — | FlexSPI (x2), SEMC, Parallel NAND/NOR |
| L1 Cache | — | 16 KB Instruction + 16 KB Data |
| DSP Extensions | — | Yes (SIMD, MAC) |
| Level ng MSL | — | 3 (per JEDEC J-STD-020) |