MPC8358EZQAGDDA vs MPC8358VRAGDDA Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng MPC8358EZQAGDDA sa pamamagitan ng NXP Semiconductors at MPC8358VRAGDDA sa pamamagitan ng NXP Semiconductors. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
NXP Semiconductors
MPC8358VRAGDDA - PowerQUICC II Pro MPU 400MHz 668-BGA | NXP
MPC8358VRAGDDA ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | MPC8358EZQAGDDA | MPC8358VRAGDDA |
|---|---|---|
| Brand | NXP Semiconductors | NXP Semiconductors |
| Kategorya | Microcontrollers | Microcontrollers |
| Katayuan ng Lifecycle | Aktibo | Huling Pagbili |
| Core Architecture | PowerPC e300 (single core) | — |
| Width ng Data Bus | 32-bit | — |
| Maximum Core Frequency | 400 MHz | — |
| Core Supply Voltage | 1.2 V | — |
| Package Type | 668-pin TE-PBGA-PGE (29x29 mm) | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (BGA) |
| Memory Interface | DDR1/DDR2 with ECC | — |
| Ethernet | Up to 3 x 10/100/1000 Mbit (via QUICC Engine) | — |
| PCI | PCI 2.2, 32-bit, up to 66 MHz | — |
| USB | USB 2.0 (Full/High Speed) | — |
| Serial Protocols | ATM, HDLC, TDM, UART | — |
| Security Engine | SEC 2.0 (IPSec/SSL/3GPP acceleration) | Integrated (IPsec / Kasumi) |
| Local Bus | 8 chip selects, SRAM/Flash/NOR | — |
| Temperature na Operasyon | 0 C to +105 C (junction) | 0 °C to +105 °C (commercial) |
| Lead-Free / RoHS | Lead-free finish; RoHS compliant | — |
| Level ng MSL | [DATA_NEEDED: MSL moisture sensitivity level] | — |
| Processor Family | — | PowerQUICC II Pro (MPC83xx) |
| Core | — | PowerPC e300, 1 Core, 32-Bit |
| Core Frequency | — | 400 MHz |
| Instruction Set Architecture | — | RISC, 32-Bit Power Architecture |
| Process Technology | — | 0.13 µm CMOS |
| Operating Voltage (Core) | — | 1.8 V |
| Operating Voltage (I/O) | — | 2.5 V / 3.3 V |
| Packhaging | — | 668-pin TBGA, 29 mm × 29 mm, 1.0 mm pitch |
| L1 Cache | — | 32 KB instruction + 32 KB data (per core) |
| Memory Controller | — | DDR1 / DDR2 SDRAM with ECC (32-bit) |
| PCI Interface | — | 32-bit PCI 2.2 |
| Ethernet MAC | — | 10/100/1 Gbit Ethernet |
| USB Interface | — | USB 2.0 Full/Low Speed |
| Serial Interfaces | — | TDM, ATM, UART |
| Tindminan RoHS | — | Compliant (per DigiKey listing) |