MPC8547EVTAUJC vs MPC8547VTAUJB Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng MPC8547EVTAUJC sa pamamagitan ng NXP Semiconductors at MPC8547VTAUJB sa pamamagitan ng NXP Semiconductors. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
NXP Semiconductors
MPC8547EVTAUJC - PowerPC e500 MPU 1.333GHz 783-FCBGA | NXP
MPC8547EVTAUJC ObsoleteNXP Semiconductors
MPC8547VTAUJB - PowerPC e500 MPU 1.333GHz 783-FCBGA | NXP
MPC8547VTAUJB ✓ NakahandaPagsanggunian na paghahambing
| Parametro | MPC8547EVTAUJC | MPC8547VTAUJB |
|---|---|---|
| Brand | NXP Semiconductors | NXP Semiconductors |
| Kategorya | Microcontrollers | Microcontrollers |
| Katayuan ng Lifecycle | Obsolete | Aktibo |
| Manufacturer | NXP Semiconductors (formerly Freescale) | NXP Semiconductors (formerly Freescale) |
| Series | MPC85xx | — |
| Core Processor | PowerPC e500 | — |
| Number of Cores | 1 | — |
| Core Width | 32-Bit | — |
| Core Speed | 1.333 GHz | — |
| Co-Processors / DSP | Signal Processing; SPE, Security; SEC | — |
| RAM Controllers | DDR, DDR2, SDRAM | — |
| Graphics Acceleration | No | — |
| Ethernet | 4 x 10/100/1000 Mbps MACs | — |
| USB | USB 2.0 (Host + Device modes via UTMI) | — |
| PCI Express | Yes (x4 / x8 SerDes) | — |
| Serial RapidIO | Yes | — |
| Packhaging | 783-BGA, FCBGA 29 mm x 29 mm | 783-FCBGA (29x29 mm) |
| Uri ng Pagpapasok | Surface Mount (BGA) | — |
| Temperature na Operasyon | -40C to +105C (industrial) | -40C to +85C (industrial) |
| Supply Voltage (Core) | 1.0 V (typ) | — |
| Supply Voltage (I/O) | 1.8 V / 2.5 V / 3.3 V (multi-rail) | — |
| Security Engine | SEC 2.0 (IPSec/SSL/AES/SHA/3DES) | — |
| L1 Cache | 32 KB I-cache + 32 KB D-cache | — |
| L2 Cache | 256 KB unified | 256 KB (unified) |
| Tindminan RoHS | Compliant (lead-free FCBGA) | Compliant (PB Free variant available) |
| Product Family | — | PowerQUICC III / MPC85xx |
| Core Architecture | — | Power Architecture e500 (Book E) |
| Core Count | — | 1 |
| Data Width | — | 32-bit |
| Maximum Core Frequency | — | 1.333 GHz |
| Ball Pitch | — | 1.0 mm |
| L1 Instruction Cache | — | 32 KB |
| L1 Data Cache | — | 32 KB |
| Memory Controller | — | DDR2 SDRAM with ECC |
| Integrated Ethernet | — | Dual 10/100/1000 MAC |
| High-Speed I/O | — | PCI Express, RapidIO (SerDes) |