P1020NXN2HFB vs P1020NXN2FFB Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng P1020NXN2HFB sa pamamagitan ng NXP Semiconductors at P1020NXN2FFB sa pamamagitan ng NXP Semiconductors. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
NXP Semiconductors
P1020NXN2HFB - QorIQ P1 Dual-Core 800MHz MPU | NXP Semiconductors
P1020NXN2HFB ⚠ Huling PagbiliNXP Semiconductors
P1020NXN2FFB - QorIQ P1 Dual-Core 800MHz SoC, 689-TEPBGA | NXP
P1020NXN2FFB ✓ NakahandaPagsanggunian na paghahambing
| Parametro | P1020NXN2HFB | P1020NXN2FFB |
|---|---|---|
| Brand | NXP Semiconductors | NXP Semiconductors |
| Kategorya | Microcontrollers | Microcontrollers |
| Katayuan ng Lifecycle | Huling Pagbili | Aktibo |
| Processor Family | PowerPC e500v2 | — |
| CPU Cores | 2 | — |
| Width ng Data Bus | 32-bit | 32-bit |
| Maximum Core Frequency | 800 MHz | — |
| Packhaging / Kaso | 689-TEPBGA II (31 x 31 mm) with exposed thermal pad | — |
| Process Technology | 45 nm CMOS | 45 nm CMOS |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount (BGA) |
| Hanay ng Temperature na Operasyon | [DATA_NEEDED: operating temperature range] | — |
| Volte ng Pagbibigay | [DATA_NEEDED: core/IO voltage] | 0.95 V minimum (core) |
| Tindminan RoHS | RoHS Compliant | Compliant |
| Lead-Free Status | Lead Free | — |
| Series | QorIQ P1 | — |
| Peripherals | Ethernet MACs, PCI Express, USB, SDHC, I2C, SPI, UART, TDM, DMA, Security Engine | — |
| Security | Integrated security/crypto engine (per QorIQ P1 family) | — |
| Memory Interface | DDR3/DDR2 controller with ECC (per QorIQ P1 family) | — |
| Architecture | — | Power Architecture e500v2 |
| Core Count | — | 2 (dual-core) |
| Core Frequency | — | 800 MHz (2 x 667 MHz internal) |
| Packhaging | — | 689-TEPBGA II (31x31 mm) |
| Package Pin Count | — | 689 (ball grid) |
| Temperature na Operasyon | — | -40C to +125C (extended industrial) |
| Silicon Revision | — | R1.1 |
| Memory Controller | — | DDR2/DDR3 with ECC, 64-bit |
| Maximum Memory Capacity | — | [DATA_NEEDED: maximum DDR capacity] |
| Ethernet Interfaces | — | GbE (10/100/1000) |
| PCIe | — | PCIe Gen1 (x1/x2) |
| USB | — | USB 2.0 controller |
| TDM Ports | — | Yes |