RTAX1000SL-CGS624V vs RTAX1000SL-1CGS624E Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng RTAX1000SL-CGS624V sa pamamagitan ng Microchip Technology at RTAX1000SL-1CGS624E sa pamamagitan ng Microchip Technology. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Microchip Technology
RTAX1000SL-CGS624V - 1M-Gate Rad-Tolerant FPGA | Microchip
RTAX1000SL-CGS624V ✓ NakahandaMicrochip Technology
RTAX1000SL-1CGS624E - 1M-Gate Rad-Tolerant FPGA CCGA-624 | Microchip
RTAX1000SL-1CGS624E ✓ NakahandaPagsanggunian na paghahambing
| Parametro | RTAX1000SL-CGS624V | RTAX1000SL-1CGS624E |
|---|---|---|
| Brand | Microchip Technology | Microchip Technology |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| System Gates | 1,000,000 | 1,000,000 |
| Logic Cells | 18144 | — |
| CLBs | 12096 | — |
| Technology | Digital CMOS antifuse | — |
| Family | RTAX-S/SL Radiation-Tolerant FPGAs | RTAX-S/SL (radiation-tolerant, antifuse) |
| Programmability | One-Time Programmable (antifuse), live at power-up | — |
| Embedded Memory | Embedded SRAM with built-in FIFO control logic | Embedded SRAM with built-in FIFO control logic |
| Clock Resources | Segmentable clocks, chip-wide highway routing | — |
| Carry Logic | Yes (dedicated fast carry chain) | — |
| Packhaging | CGS624 (624-column ceramic grid array) | CGA-624 (ceramic column grid array, 624 pins) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Application Domain | Space-flight systems | Space flight systems |
| Radiation Tolerance | Radiation-tolerant (TID/SEE per manufacturer qualification) | — |
| Max Family Density | 4,000,000 equivalent system gates | — |
| Base Commercial Family | Axcelerator | — |
| Temperature na Operasyon | [DATA_NEEDED: operating temperature range] | -55C to +125C |
| Volte ng Pagbibigay | [DATA_NEEDED: core supply voltage] | — |
| Maximum User I/O | [DATA_NEEDED: maximum user I/O count] | — |
| ASIC Gates (embedded) | — | 125,000 |
| Configurable Logic Blocks (CLBs) | — | 12096 |
| Process Technology | — | 0.15 um CMOS |
| Core Supply Voltage | — | 1.5 V |
| Maximum System Performance | — | 581 MHz |
| Speed Grade | — | -1 |
| Programming Technology | — | Antifuse (one-time programmable, live at power-up) |
| SEU Immunity | — | SEU-hardened registers; soft-error rate < 10-10 errors/bit-day |
| Tindminan RoHS | — | [DATA_NEEDED: RoHS status] |
| Embedded FIFO Control | — | Yes |