RTAX1000SL-CGS624V vs RTAX1000SL-1CGS624V Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng RTAX1000SL-CGS624V sa pamamagitan ng Microchip Technology at RTAX1000SL-1CGS624V sa pamamagitan ng Microchip Technology. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Microchip Technology
RTAX1000SL-CGS624V - 1M-Gate Rad-Tolerant FPGA | Microchip
RTAX1000SL-CGS624V ✓ NakahandaMicrochip Technology
RTAX1000SL-1CGS624V - 1M-Gate Rad-Tolerant FPGA | Microchip
RTAX1000SL-1CGS624V ✓ NakahandaPagsanggunian na paghahambing
| Parametro | RTAX1000SL-CGS624V | RTAX1000SL-1CGS624V |
|---|---|---|
| Brand | Microchip Technology | Microchip Technology |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| System Gates | 1,000,000 | 1,000,000 (1.00E6) |
| Logic Cells | 18144 | — |
| CLBs | 12096 | — |
| Technology | Digital CMOS antifuse | — |
| Family | RTAX-S/SL Radiation-Tolerant FPGAs | — |
| Programmability | One-Time Programmable (antifuse), live at power-up | — |
| Embedded Memory | Embedded SRAM with built-in FIFO control logic | Embedded SRAM with built-in FIFO control logic |
| Clock Resources | Segmentable clocks, chip-wide highway routing | — |
| Carry Logic | Yes (dedicated fast carry chain) | — |
| Packhaging | CGS624 (624-column ceramic grid array) | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Application Domain | Space-flight systems | — |
| Radiation Tolerance | Radiation-tolerant (TID/SEE per manufacturer qualification) | Radiation-tolerant (space-flight qualified family) |
| Max Family Density | 4,000,000 equivalent system gates | — |
| Base Commercial Family | Axcelerator | — |
| Temperature na Operasyon | [DATA_NEEDED: operating temperature range] | -55C to +125C |
| Volte ng Pagbibigay | [DATA_NEEDED: core supply voltage] | [DATA_NEEDED: core/IO supply voltage] |
| Maximum User I/O | [DATA_NEEDED: maximum user I/O count] | — |
| Logic Cells / Logic Blocks | — | 12096 |
| Logic Family | — | Digital CMOS |
| Programmable Technology | — | Antifuse (one-time programmable) |
| Package Type | — | CGA-624 (ceramic column grid array) |
| Bilang ng Pin | — | 624 |
| Speed Grade | — | -1 (standard) |
| SEU Immunity | — | SEU-hardened registers; SEU rate < 10-10 errors/bit-day |
| Configuration | — | Live at power-up, single chip, no external boot PROM |
| Clocking | — | Segmentable clock resources |
| Routing Features | — | Chip-wide highway routing, carry logic |
| Tindminan RoHS | — | [DATA_NEEDED: RoHS status] |