RTAX1000SL-CGS624V vs RTAX1000SL-1CGS624V 对比
详细并排对比 RTAX1000SL-CGS624V 出自 Microchip Technology 和 RTAX1000SL-1CGS624V 出自 Microchip Technology。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
Microchip Technology
RTAX1000SL-CGS624V - 1M-Gate Rad-Tolerant FPGA | Microchip
RTAX1000SL-CGS624V ✓ 量产中Microchip Technology
RTAX1000SL-1CGS624V - 1M-Gate Rad-Tolerant FPGA | Microchip
RTAX1000SL-1CGS624V ✓ 量产中规格对比
| 参数 | RTAX1000SL-CGS624V | RTAX1000SL-1CGS624V |
|---|---|---|
| 品牌 | Microchip Technology | Microchip Technology |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 有效 | 有效 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $3,400.00 | $1.00 |
| System Gates | 1,000,000 | 1,000,000 (1.00E6) |
| Logic Cells | 18144 | — |
| CLBs | 12096 | — |
| Technology | Digital CMOS antifuse | — |
| Family | RTAX-S/SL Radiation-Tolerant FPGAs | — |
| Programmability | One-Time Programmable (antifuse), live at power-up | — |
| Embedded Memory | Embedded SRAM with built-in FIFO control logic | Embedded SRAM with built-in FIFO control logic |
| Clock Resources | Segmentable clocks, chip-wide highway routing | — |
| Carry Logic | Yes (dedicated fast carry chain) | — |
| 封装 | CGS624 (624-column ceramic grid array) | — |
| 安装类型 | Surface Mount | Surface Mount |
| Application Domain | Space-flight systems | — |
| Radiation Tolerance | Radiation-tolerant (TID/SEE per manufacturer qualification) | Radiation-tolerant (space-flight qualified family) |
| Max Family Density | 4,000,000 equivalent system gates | — |
| Base Commercial Family | Axcelerator | — |
| 工作温度 | [DATA_NEEDED: operating temperature range] | -55C to +125C |
| 电源电压 | [DATA_NEEDED: core supply voltage] | [DATA_NEEDED: core/IO supply voltage] |
| Maximum User I/O | [DATA_NEEDED: maximum user I/O count] | — |
| Logic Cells / Logic Blocks | — | 12096 |
| Logic Family | — | Digital CMOS |
| Programmable Technology | — | Antifuse (one-time programmable) |
| Package Type | — | CGA-624 (ceramic column grid array) |
| 引脚数量 | — | 624 |
| Speed Grade | — | -1 (standard) |
| SEU Immunity | — | SEU-hardened registers; SEU rate < 10-10 errors/bit-day |
| Configuration | — | Live at power-up, single chip, no external boot PROM |
| Clocking | — | Segmentable clock resources |
| Routing Features | — | Chip-wide highway routing, carry logic |
| RoHS 状态 | — | [DATA_NEEDED: RoHS status] |