RTAX2000S-1CG624PROTO vs RTAX2000S-1LG624V Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng RTAX2000S-1CG624PROTO sa pamamagitan ng Microchip Technology at RTAX2000S-1LG624V sa pamamagitan ng Microchip Technology. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Microchip Technology
RTAX2000S-1CG624PROTO - 2M-Gate Rad-Tolerant FPGA | Microchip
RTAX2000S-1CG624PROTO ✓ NakahandaMicrochip Technology
RTAX2000S-1LG624V - 2M-Gate Rad-Tolerant Antifuse FPGA | Microchip
RTAX2000S-1LG624V ✓ NakahandaPagsanggunian na paghahambing
| Parametro | RTAX2000S-1CG624PROTO | RTAX2000S-1LG624V |
|---|---|---|
| Brand | Microchip Technology | Microchip Technology |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Equivalent System Gates | 2000000 | 2,000,000 gates |
| Logic Cells | 32256 | — |
| Configurable Logic Blocks (CLBs) | 21504 | 21,504 |
| Embedded Memory | 540 kbits (family max, with optional EDAC) | Up to 540 kbits SRAM with optional EDAC protection |
| User I/Os (family max) | 684 | — |
| Total Ionizing Dose (functional) | 300 krad (Si) | — |
| Total Ionizing Dose (parametric) | 200 krad (Si) | — |
| SEU Rate | Less than 1E-10 errors per bit-day | — |
| Maximum System Frequency | 350 MHz (family performance) | — |
| Technology | CMOS antifuse (one-time programmable) | — |
| Speed Grade | -1 | -1 |
| Packhaging | CCGA-624 (CG624 ceramic column grid array) | CG624, 624-pin ceramic column grid array |
| Configuration | Live at power-up (nonvolatile antifuse) | Single-chip, live at power-up (no boot device required) |
| Qualification Flow | PROTO (engineering prototype) | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Family | RTAX-S/SL Radiation-Tolerant FPGA | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Temperature na Operasyon | [DATA_NEEDED: operating temperature range] | — |
| User I/Os (maximum, family) | — | Up to 684 |
| Total Ionizing Dose (TID), functional | — | 300 krad (Si) |
| Total Ionizing Dose (TID), parametric | — | 200 krad (Si) |
| SEU Immunity | — | Less than 1E-10 errors per bit-day |
| Programming Technology | — | One-time programmable antifuse, nonvolatile |
| Process Technology | — | Digital CMOS |
| Package Temperature Suffix | — | V (space/military screening variant) |
| Family Lineage | — | RTAX-S/SL, based on commercial Axcelerator family |
| Hanay ng Temperature na Operasyon | — | [DATA_NEEDED: operating temperature range] |
| Core Supply Voltage | — | [DATA_NEEDED: core supply voltage] |