RTAX2000S-LG1152V vs RTAX2000SL-LG1152V Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng RTAX2000S-LG1152V sa pamamagitan ng Microsemi at RTAX2000SL-LG1152V sa pamamagitan ng Microchip Technology. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Microsemi
RTAX2000S-LG1152V - 2M-Gate Rad-Tolerant FPGA | Actel/Microchip
RTAX2000S-LG1152V ✓ NakahandaMicrochip Technology
RTAX2000SL-LG1152V - 2M-Gate Rad-Tolerant FPGA | Microchip
RTAX2000SL-LG1152V ✓ NakahandaPagsanggunian na paghahambing
| Parametro | RTAX2000S-LG1152V | RTAX2000SL-LG1152V |
|---|---|---|
| Brand | Microsemi | Microchip Technology |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | RTAX-S/SL and RTAX-DSP Radiation-Tolerant FPGAs | RTAX-S/SL RadTolerant FPGAs |
| Equivalent System Gates | 2000000 | 2000000 gates |
| Logic Cells | 32256 | 32256 |
| CLBs | 21504 | — |
| Technology | Digital CMOS, antifuse (one-time programmable) | Digital CMOS antifuse (nonvolatile) |
| Base Architecture | Microsemi commercial Axcelerator family | — |
| Embedded Memory | Embedded SRAM with built-in FIFO control logic | Up to 540 kbits SRAM with optional EDAC |
| Clocking | Segmentable clocks | — |
| Routing | Chip-wide highway routing and carry logic | — |
| Power-Up Behavior | Live at power-up (no external configuration device) | — |
| Radiation Tolerance | Radiation-tolerant for space-flight systems | — |
| Packhaging | LG1152 (1152-pin ceramic column grid array) | 1152-pin ceramic column grid array (CG1152) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Temperature na Operasyon | [DATA_NEEDED: Operating Temperature] | [DATA_NEEDED: operating temperature range] |
| Core Supply Voltage | [DATA_NEEDED: Core Supply Voltage] | — |
| Max User I/O | [DATA_NEEDED: Max User I/O count] | — |
| Level ng MSL | [DATA_NEEDED: MSL Level] | — |
| Configurable Logic Blocks (CLBs) | — | 21504 |
| User I/Os | — | Up to 684 (package dependent) |
| Total Ionizing Dose (Functional) | — | 300 krad (Si) |
| Total Ionizing Dose (Parametric) | — | 200 krad (Si) |
| SEU Rate | — | Less than 1E-10 errors per bit-day |
| Configuration | — | One-time programmable antifuse, live at power-up |
| Radiation Environment | — | Space-flight (rad-tolerant) |
| Derivative Family Base | — | Microsemi Axcelerator commercial FPGA family |
| Tindminan RoHS | — | [DATA_NEEDED: RoHS status] |