RTAX250S-CG624E vs RTAX250S-CG624EV Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng RTAX250S-CG624E sa pamamagitan ng Microchip Technology at RTAX250S-CG624EV sa pamamagitan ng Microchip Technology. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Microchip Technology
RTAX250S-CG624E RTAX250S-CG624E - 250K-Gate Rad-Tolerant FPGA | Microchip

RTAX250S-CG624E - 250K-Gate Rad-Tolerant FPGA | Microchip

RTAX250S-CG624E ✓ Nakahanda
Microchip Technology
RTAX250S-CG624EV RTAX250S-CG624EV - 250K-Gate Rad-Tolerant FPGA | Microchip

RTAX250S-CG624EV - 250K-Gate Rad-Tolerant FPGA | Microchip

RTAX250S-CG624EV ✓ Nakahanda

Pagsanggunian na paghahambing

Parametro RTAX250S-CG624E RTAX250S-CG624EV
Brand Microchip Technology Microchip Technology
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Aktibo Aktibo
System Gates 250000 gates 250000 gates
Logic Cells (CLBs) 2816 —
Maximum Toggle Frequency 649 MHz —
Process Technology 0.15 um CMOS 0.15 um CMOS
Core Supply Voltage 1.5 V 1.5 V
Logic Family CMOS CMOS
CLB Combinatorial Delay (max) 0.930 ns —
Package Type CCGA-624 (ceramic column grid array, 624 pins) 624-pin Ceramic Grid Array (CGA/CCGA)
Temperature na Operasyon -55C to +125C -55C to +125C
Programming Technology Antifuse (one-time programmable) —
SEU Hardening SEU-hardened registers, no external TMR required —
SEU Immunity Immune to single-event upsets to specified LET threshold; SEU rate < 10-10 errors/bit-day [DATA_NEEDED: LET threshold (MeV-cm2/mg)]
Power-Up Behavior Live at power-up (true single-chip) —
Family RTAX-S radiation-tolerant FPGA RTAX-S RadTolerant FPGA
Uri ng Pagpapasok Surface Mount Surface Mount (ceramic column grid array)
Target Application Space-flight systems —
Logic Cells — 4224 cells
Configurable Logic Blocks (CLBs) — 2816
Maksimum na Taktiko ng Oras — 649 MHz
Bilang ng Pin — 624
Radiation Tolerance — SEU-hardened registers; SEU rate < 10-10 errors per bit-day
Configuration — Anti-fuse, live-at-power-up, single chip
Tindminan RoHS — [DATA_NEEDED: RoHS status]

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