RTAX250S-CG624V vs RTAX2000SL-CGS624V Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng RTAX250S-CG624V sa pamamagitan ng Microchip Technology at RTAX2000SL-CGS624V sa pamamagitan ng Microchip Technology. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Microchip Technology
RTAX250S-CG624V - 250K-Gate Rad-Tolerant FPGA | Microchip
RTAX250S-CG624V ✓ NakahandaMicrochip Technology
RTAX2000SL-CGS624V - 2M-Gate Rad-Tolerant FPGA | Microchip
RTAX2000SL-CGS624V ✓ NakahandaPagsanggunian na paghahambing
| Parametro | RTAX250S-CG624V | RTAX2000SL-CGS624V |
|---|---|---|
| Brand | Microchip Technology | Microchip Technology |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | RTAX-S Radiation-Tolerant FPGA | RTAX-S/SL Radiation-Tolerant FPGA |
| Equivalent System Gates | 250000 | 2000000 |
| Configurable Logic Blocks (CLBs) | 2816 | — |
| Logic Cells | 4224 | — |
| Maximum System Frequency | 649 MHz | — |
| Process Technology | 0.15 um CMOS | — |
| Core Supply Voltage | 1.5 V nominal | [DATA_NEEDED: core supply voltage] |
| User I/O | 248 | — |
| Packhaging | 624-pin Ceramic Column Grid Array (CCGA) | CG624 ceramic package |
| Temperature na Operasyon | -55C to +125C | [DATA_NEEDED: operating temperature range] |
| Programming Technology | Antifuse (live at power-up) | — |
| SEU Immunity | SEU-hardened registers, immune to single-event upsets | — |
| Embedded Memory | Embedded SRAM with built-in FIFO control logic | 540 kbits with optional EDAC protection |
| Special Routing | Segmentable clocks, chip-wide highway routing, carry logic | — |
| Uri ng Pagpapasok | Surface Mount | — |
| Target Application | Space-flight systems | — |
| Logic Cells (CLBs) | — | 21504 |
| Technology | — | CMOS antifuse (nonvolatile) |
| User I/Os (maximum) | — | 684 |
| Total Ionizing Dose (TID) | — | 300 krad (Si) functional / 200 krad (Si) parametric |
| Single-Event Upset Rate | — | Less than 1E-10 errors per bit-day |
| Configuration | — | One-time programmable antifuse, live at power-up |
| Embedded SRAM Features | — | Built-in FIFO control logic |
| Clock Architecture | — | Segmentable clock structures |
| Routing | — | Chip-wide highway routing, carry logic |
| Application Domain | — | Space-flight systems |
| I/O Supply Voltage | — | [DATA_NEEDED: I/O supply voltage] |
| Speed Grade | — | [DATA_NEEDED: speed grade] |
| System Frequency (typical) | — | [DATA_NEEDED: system frequency] |