RTAX4000D-CQ352EV vs RTAX4000D-CQ352E Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng RTAX4000D-CQ352EV sa pamamagitan ng Microchip Technology at RTAX4000D-CQ352E sa pamamagitan ng Microsemi. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Microchip Technology
RTAX4000D-CQ352EV - 4M-Gate Rad-Tolerant FPGA CQFP-352 | Microchip
RTAX4000D-CQ352EV ✓ NakahandaMicrosemi
RTAX4000D-CQ352E - 4M Gate Rad-Tolerant FPGA CQFP-352 | Microchip
RTAX4000D-CQ352E ✓ NakahandaPagsanggunian na paghahambing
| Parametro | RTAX4000D-CQ352EV | RTAX4000D-CQ352E |
|---|---|---|
| Brand | Microchip Technology | Microsemi |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | RTAX-DSP Radiation-Tolerant FPGA | RTAX-DSP Radiation-Tolerant FPGA |
| Equivalent System Gates | 4,000,000 | — |
| Logic Cells | 33,600 | 33,600 |
| CLB Organization | 36,960 CLBs | — |
| Process Technology | 0.15 um CMOS | 0.15 um CMOS |
| Core Supply Voltage | 1.5 V nominal (1.425 V to 1.575 V) | 1.5 V |
| Packhaging | 352-Pin Ceramic CQFP | 352-Pin CQFP (CQ352) ceramic, hermetic |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Temperature na Operasyon | -55C to +125C | [DATA_NEEDED: operating temperature range] |
| Combinatorial CLB Delay | [DATA_NEEDED: combinatorial CLB delay] | — |
| Embedded Memory | Embedded SRAM with FIFO control logic | Embedded SRAM with built-in FIFO control logic |
| Configuration | Live at power-up, single-chip | Live at power-up (antifuse, single-chip) |
| Radiation Tolerance | Radiation-tolerant (space flight) [DATA_NEEDED: TID/SEE levels] | Radiation-tolerant, space-flight qualified family (per Microchip RTAX-DSP product page) |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status - hermetic ceramic aerospace package, typically exempt] |
| Level ng MSL | [DATA_NEEDED: MSL level] | — |
| System Gates | — | 4,000,000 |
| Clocking | — | Segmentable clocks, chip-wide highway routing |
| Number of CLBs | — | [DATA_NEEDED: CLB / AX cell organization count] |
| User I/O Count | — | [DATA_NEEDED: user I/O count for CQ352 package] |
| Speed Grade | — | Standard (no dash-1 speed suffix indicated in CQ352E ordering code) |
| Design Software | — | Microsemi/Microchip Libero SoC |