RTAX4000S-LG1272V vs RTAX4000SL-LG1272V Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng RTAX4000S-LG1272V sa pamamagitan ng Microchip Technology at RTAX4000SL-LG1272V sa pamamagitan ng Microchip Technology. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Microchip Technology
RTAX4000S-LG1272V - 4M-Gate Rad-Tolerant FPGA | Microchip
RTAX4000S-LG1272V ✓ NakahandaMicrochip Technology
RTAX4000SL-LG1272V - 4M-Gate Rad-Tolerant FPGA | Microchip
RTAX4000SL-LG1272V ✓ NakahandaPagsanggunian na paghahambing
| Parametro | RTAX4000S-LG1272V | RTAX4000SL-LG1272V |
|---|---|---|
| Brand | Microchip Technology | Microchip Technology |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Equivalent System Gates | 4,000,000 | 4000000 |
| Logic Cells (D-Modules) | 60480 | — |
| CLBs (R-Cells) | 40320 | — |
| Logic Family | CMOS, antifuse, one-time programmable | — |
| Core Supply Voltage | 1.5 V nominal | — |
| Temperature na Operasyon | -55C to +125C | [DATA_NEEDED: Operating Temperature] |
| Packhaging | LG1272 ceramic column grid array, 1272 pins | 1272-pin ceramic LG (CGA) package |
| Terminal Pitch | 1.000 mm | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| SEU Immunity | Immune to single-event upsets up to LETTH MeVcm2/mg | — |
| SEU Rate | < 10-10 errors per bit-day | — |
| SEU-Hardened Registers | Yes (eliminates need for TMR) | — |
| Configuration | Live at power-up, single-chip (no external boot device) | — |
| Radiation Tolerance | RadTolerant RTAX-S family | Radiation-tolerant, space-flight grade |
| Application Domain | Space-flight systems | Space-flight systems |
| Speed Grade | Standard (unmarked in LG1272V suffix) | — |
| Moisture Sensitivity Level | [DATA_NEEDED: MSL level] | — |
| Logic Cells | — | 60480 |
| CLBs | — | 40320 |
| Family | — | RTAX-S/SL and RTAX-DSP |
| Programming Technology | — | Antifuse (one-time programmable) |
| Power-Up Mode | — | Live at power-up (LAPU) |
| Form Factor | — | True single-chip |
| Embedded Memory | — | Embedded SRAM with built-in FIFO control logic |
| Clocking | — | Segmentable clocks |
| Routing | — | Chip-wide highway routing, carry logic |
| Base Architecture | — | Microsemi Axcelerator commercial family |
| Tindminan RoHS | — | [DATA_NEEDED: RoHS Status] |
| Core Voltage | — | [DATA_NEEDED: Core Voltage] |
| Maximum User I/O | — | [DATA_NEEDED: Maximum User I/O] |
| Embedded SRAM Bits | — | [DATA_NEEDED: Embedded SRAM Bits] |