T4160NSN7QTB vs T4080NSE7QTB Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng T4160NSN7QTB sa pamamagitan ng NXP Semiconductors at T4080NSE7QTB sa pamamagitan ng NXP Semiconductors. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

NXP Semiconductors
T4160NSN7QTB T4160NSN7QTB - QorIQ 16x 1.67GHz SoC, 2x10GE, FCBGA-1932 | NXP

T4160NSN7QTB - QorIQ 16x 1.67GHz SoC, 2x10GE, FCBGA-1932 | NXP

T4160NSN7QTB ✓ Nakahanda
NXP Semiconductors
T4080NSE7QTB T4080NSE7QTB - QorIQ T4 8-Core 1.8GHz PowerPC MPU | NXP

T4080NSE7QTB - QorIQ T4 8-Core 1.8GHz PowerPC MPU | NXP

T4080NSE7QTB ✓ Nakahanda

Pagsanggunian na paghahambing

Parametro T4160NSN7QTB T4080NSE7QTB
Brand NXP Semiconductors NXP Semiconductors
Kategorya Microcontrollers Microcontrollers
Katayuan ng Lifecycle Aktibo Aktibo
Architecture Power Architecture e6500, 64-bit PowerPC e6500, 64-bit
Number of Cores 8 physical / 16 virtual threads —
Core Frequency 1.67 GHz (typical) —
Family QorIQ T4 (T4080/T4160/T4240) —
Memory Controller DDR3L, 64-bit, 1.87 GT/s —
10 Gigabit Ethernet 2x 10GE MACs —
Packet Acceleration Data Path Acceleration Architecture (DPAA) —
Cryptography Disabled (per part designation) Enabled (hardware crypto accelerator)
Packhaging 1932-ball FCBGA 1932-FCPBGA (45x45 mm)
Temperature na Operasyon 0°C to 105°C 0 C to 105 C
Process Technology CMOS, 45 nm —
Revision Rev 2 —
Level ng MSL 3 (per Partstack record) [DATA_NEEDED: MSL rating]
Terminal Finish Tin-Silver-Copper (e1, JESD-609) —
Tindminan RoHS [DATA_NEEDED: RoHS status] Compliant
Core Count — 4 physical cores, 8 hardware threads
Maximum Core Frequency — 1.8 GHz
DDR Memory Controller — DDR3L up to 1.87 GT/s
Ethernet Interfaces — 2x 10 Gigabit Ethernet
Silicon Revision — 2.0
Uri ng Pagpapasok — Surface Mount (BGA)
Product Family — QorIQ T4
Volte ng Pagbibigay — [DATA_NEEDED: core/IO voltage]
Thermal Design Power — [DATA_NEEDED: TDP]
Cache (L2 per core) — [DATA_NEEDED: L2 size]

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